Zigbee over tinyos: Implementation and experimental challenges

The IEEE 802.15.4/Zigbee protocols are a promising technology for Wireless Sensor Networks (WSNs). This paper shares our experience on the implementation and use of these protocols and related technologies in WSNs. We present problems and challenges we have been facing in implementing an IEEE 802.15.4/ZigBee stack for TinyOS in a two-folded perspective: IEEE 802.15.4/ZigBee protocol standards limitations (ambiguities and open issues) and technological limitations (hardware and software). Concerning the former, we address challenges for building scalable and synchronized multi-cluster ZigBee networks, providing a trade-off between timeliness and energy-efficiency. On the latter issue, we highlight implementation problems in terms of hardware, timer handling and operating system limitations. We also report on our experience from experimental test-beds, namely on physical layer aspects such as coexistence problems between IEEE 802.15.4 and 802.11 radio channels.

An integrated approach for TQM implementation in SMEs

This paper tackles the broad issue of TQM implementation in SMEs. It includes a review of two models aimed at improving organisational performance, the EFQM Excellence Model and the Balanced Scorecard, which have been widely used in large organisations. Both models are examined as to their suitability and applicability to small and medium sized enterprises. The findings indicate that SMEs can benefit from the adoption of an integrated approach that combines both models if some critical factors are considered in the implementation process. A theoretical framework is proposed, which considers such integration and leads to a gradual implementation of TQM principles and methods in SMEs.

Implementation details of the time division beacon scheduling approach for ZigBee cluster-tree networks

This technical report describes the implementation details of the Time Division Beacon Scheduling Approach in IEEE 802.15.4/ZigBee Cluster-Tree Networks. In this technical report we describe the implementation details, focusing on some aspects of the ZigBee Network Layer and the Time Division Beacon Scheduling mechanism. This report demonstrates the feasibility of our approach based on the evaluation of the experimental results. We also present an overview of the ZigBee address and tree-routing scheme.

Design and implementation of a behaviorally typed programming system for web services

Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para a obtenção do Grau de Mestre em Engenharia Informática.

Object transportation by multiple mobile robots controlled by attractor dynamics: theory and implementation

Dynamical systems theory is used as a theoretical language and tool to design a distributed control architecture for teams of mobile robots, that must transport a large object and simultaneously avoid collisions with (either static or dynamic) obstacles. Here we demonstrate in simulations and implementations in real robots that it is possible to simplify the architectures presented in previous work and to extend the approach to teams of n robots. The robots have no prior knowledge of the environment. The motion of each robot is controlled by a time series of asymptotical stable states. The attractor dynamics permits the integration of information from various sources in a graded manner. As a result, the robots show a strikingly smooth an stable team behaviour.

Efficient Implementation Of A Single-Precision Floating-Point Arithmetic Unit on FPGA

This paper presents a single precision floating point arithmetic unit with support for multiplication, addition, fused multiply-add, reciprocal, square-root and inverse squareroot with high-performance and low resource usage. The design uses a piecewise 2nd order polynomial approximation to implement reciprocal, square-root and inverse square-root. The unit can be configured with any number of operations and is capable to calculate any function with a throughput of one operation per cycle. The floatingpoint multiplier of the unit is also used to implement the polynomial approximation and the fused multiply-add operation. We have compared our implementation with other state-of-the-art proposals, including the Xilinx Core-Gen operators, and conclude that the approach has a high relative performance/area efficiency. © 2014 Technical University of Munich (TUM).

Implementation of a dominance protocol for wireless medium access

Consider the problem of scheduling sporadic message transmission requests with deadlines. For wired channels, this has been achieved successfully using the CAN bus. For wireless channels, researchers have recently proposed a similar solution; a collision-free medium access control (MAC) protocol that implements static-priority scheduling. Unfortunately no implementation has been reported, yet. We implement and evaluate it to find that the implementation indeed is collision-free and prioritized. This allows us to develop schedulability analysis for the implementation. We measure the response times of messages in our implementation and find that our new response-time analysis indeed offers an upper bound on the response times. This enables a new class of wireless real-time systems with timeliness guarantees for sporadic messages and it opens-up a new research area: schedulability analysis for wireless networks.

An IEEE 802.15.4 protocol implementation (in nesC/TinyOS): reference guide v1.0

This technical report is to provide a reference guide to the implementation of the IEEE 802.15.4 protocol in nesC/TinyOS for the MICAz motes. The implementation is provided as a tool that can be used to implement, test and evaluate the current functionalities defined in the protocol standard as well as to enable the development of functionalities not yet implemented and new add-ons to the protocol.

Implementation of the i-GAME mechanism in IEEE 802.15.4 WPANs

This technical report describes the implementation details of the Implicit GTS Allocation Mechanism (i-GAME), for the IEEE 802.15.4 protocol. The i-GAME was implemented in nesC/TinyOS for the CrossBow MICAz mote, over our own implementation of the IEEE 802.15.4 protocol stack. This document provides the implementation details, including a description of the i-GAME software interfaces.

Model driven development implementation of a control systems user interfaces specification tool

Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para obtenção do grau de Mestre em Engenharia Informática

Implementation contexts of a Tuberculosis Control Program in Brazilian prisons

OBJECTIVE To analyze the influence from context characteristics in the control of tuberculosis in prisons, and the influence from the program implementation degrees in observed effects.METHODS A multiple case study, with a qualitative approach, conducted in the prison systems of two Brazilian states in 2011 and 2012. Two prisons were analyzed in each state, and a prison hospital was analyzed in one of them. The data were submitted to a content analysis, which was based on external, political-organizational, implementation, and effect dimensions. Contextual factors and the ones in the program organization were correlated. The independent variable was the program implementation degree and the dependent one, the effects from the Tuberculosis Control Program in prisons.RESULTS The context with the highest sociodemographic vulnerability, the highest incidence rate of tuberculosis, and the smallest amount of available resources were associated with the low implementation degree of the program. The results from tuberculosis treatment in the prison system were better where the program had already been partially implemented than in the case with low implementation degree in both cases.CONCLUSIONS The implementation degree and its contexts – external and political-organizational dimensions – simultaneously contribute to the effects that are observed in the control of tuberculosis in analyzed prisons.

Towards a GIS-T database design and implementation for public transit planning: the case study of Dar-Es-salaam metropolitan city, Tanzania.

Dissertation submitted in partial fulfilment of the requirements for the Degree of Master of Science in Geospatial Technologies

Implementation of fractional-order electromagnetic potential through a genetic algorithm

Several phenomena present in electrical systems motivated the development of comprehensive models based on the theory of fractional calculus (FC). Bearing these ideas in mind, in this work are applied the FC concepts to define, and to evaluate, the electrical potential of fractional order, based in a genetic algorithm optimization scheme. The feasibility and the convergence of the proposed method are evaluated.

FPGA implementation of IEEE 802.15.3C receiver

This paper presents the implementation of the OFDM demodulator and the Viterbi decoder, proposed as part of a wireless High Definition video receiver to be integrated in an FPGA. These blocks were implemented in a Xilinx Virtex-6 FPGA. The complete system was previously modeled and simulated using MATLAB/Simulink to extract importante hardware characteristics for the FPGA implementation.

FPGA-based weblab infrastructures guidelines and a prototype implementation example

Recent trends show an increasing number of weblabs, implemented at universities and schools, supporting practical training in technical courses and providing the ability to remotely conduct experiments. However, their implementation is typically based on individual architectures, unable of being reconfigured with different instruments/modules usually required by every experiment. In this paper, we discuss practical guidelines for implementing reconfigurable weblabs that support both local and remote control interfaces. The underlying infrastructure is based on reconfigurable, low-cost, FPGA-based boards supporting several peripherals that are used for the local interface. The remote interface is powered by a module capable of communicating with an Ethernet based network and that can either correspond to an internal core of the FPGA or an external device. These two approaches are discussed in the paper, followed by a practical implementation example.