887 resultados para Simulated Annealing


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Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

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One of the reasons that influences the efficience of a port terminal that is especialized in movement of containers is in the process of their loading and unloading. The fundamental idea is to determine a plan, to each port in order to decrease the number of total movement of loading and unloading that are necessary during the ship route to every port so that they save time and consequently reduce costs. The goal of this research was to present improvement in the program, written in language C, used to solve to problem of loading and unloading of ships, a NP-complete problem, through the meta-heuristics Simulated Annealing. With the improvement made, an average of 50% reduction of necessary time was gotten to solve the problem in 45 analised instances and in a specific group of these instances the average reduction reached 77 and in 10 instances there was even an improvement in the solution

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Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

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Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

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A radial basis function network (RBFN) circuit for function approximation is presented. Simulation and experimental results show that the network has good approximation capabilities. The RBFN was a squared hyperbolic secant with three adjustable parameters amplitude, width and center. To test the network a sinusoidal and sine function,vas approximated.

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Pós-graduação em Engenharia Mecânica - FEG

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This paper presents a mathematical model adapted from literature for the crop rotation problem with demand constraints (CRP-D). The main aim of the present work is to study metaheuristics and their performance in a real context. The proposed algorithms for solution of the CRP-D are a genetic algorithm, a simulated annealing and hybrid approaches: a genetic algorithm with simulated annealing and a genetic algorithm with local search algorithm. A new constructive heuristic was also developed to provide initial solutions for the metaheuristics. Computational experiments were performed using a real planting area and semi-randomly generated instances created by varying the number, positions and dimensions of the lots. The computational results showed that these algorithms determined good feasible solutions in a short computing time as compared with the time spent to get optimal solutions, thus proving their efficacy for dealing with this practical application of the CRP-D.

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Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

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The emergence of wavelength-division multiplexing (WDM) technology provides the capability for increasing the bandwidth of synchronous optical network (SONET) rings by grooming low-speed traffic streams onto different high-speed wavelength channels. Since the cost of SONET add–drop multiplexers (SADM) at each node dominates the total cost of these networks, how to assign the wavelength, groom the traffic, and bypass the traffic through the intermediate nodes has received a lot of attention from researchers recently. Moreover, the traffic pattern of the optical network changes from time to time. How to develop dynamic reconfiguration algorithms for traffic grooming is an important issue. In this paper, two cases (best fit and full fit) for handling reconfigurable SONET over WDM networks are proposed. For each approach, an integer linear programming model and heuristic algorithms (TS-1 and TS-2, based on the tabu search method) are given. The results demonstrate that the TS-1 algorithm can yield better solutions but has a greater running time than the greedy algorithm for the best fit case. For the full fit case, the tabu search heuristic yields competitive results compared with an earlier simulated annealing based method and it is more stable for the dynamic case.

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Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

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The irregular shape packing problem is approached. The container has a fixed width and an open dimension to be minimized. The proposed algorithm constructively creates the solution using an ordered list of items and a placement heuristic. Simulated annealing is the adopted metaheuristic to solve the optimization problem. A two-level algorithm is used to minimize the open dimension of the container. To ensure feasible layouts, the concept of collision free region is used. A collision free region represents all possible translations for an item to be placed and may be degenerated. For a moving item, the proposed placement heuristic detects the presence of exact fits (when the item is fully constrained by its surroundings) and exact slides (when the item position is constrained in all but one direction). The relevance of these positions is analyzed and a new placement heuristic is proposed. Computational comparisons on benchmark problems show that the proposed algorithm generated highly competitive solutions. Moreover, our algorithm updated some best known results. (C) 2012 Elsevier Ltd. All rights reserved.

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This paper presents a technique for performing analog design synthesis at circuit level providing feedback to the designer through the exploration of the Pareto frontier. A modified simulated annealing which is able to perform crossover with past anchor points when a local minimum is found which is used as the optimization algorithm on the initial synthesis procedure. After all specifications are met, the algorithm searches for the extreme points of the Pareto frontier in order to obtain a non-exhaustive exploration of the Pareto front. Finally, multi-objective particle swarm optimization is used to spread the results and to find a more accurate frontier. Piecewise linear functions are used as single-objective cost functions to produce a smooth and equal convergence of all measurements to the desired specifications during the composition of the aggregate objective function. To verify the presented technique two circuits were designed, which are: a Miller amplifier with 96 dB Voltage gain, 15.48 MHz unity gain frequency, slew rate of 19.2 V/mu s with a current supply of 385.15 mu A, and a complementary folded cascode with 104.25 dB Voltage gain, 18.15 MHz of unity gain frequency and a slew rate of 13.370 MV/mu s. These circuits were synthesized using a 0.35 mu m technology. The results show that the method provides a fast approach for good solutions using the modified SA and further good Pareto front exploration through its connection to the particle swarm optimization algorithm.

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Cutting and packing problems arise in a variety of industries, including garment, wood and shipbuilding. Irregular shape packing is a special case which admits irregular items and is much more complex due to the geometry of items. In order to ensure that items do not overlap and no item from the layout protrudes from the container, the collision free region concept was adopted. It represents all possible translations for a new item to be inserted into a container with already placed items. To construct a feasible layout, collision free region for each item is determined through a sequence of Boolean operations over polygons. In order to improve the speed of the algorithm, a parallel version of the layout construction was proposed and it was applied to a simulated annealing algorithm used to solve bin packing problems. Tests were performed in order to determine the speed improvement of the parallel version over the serial algorithm