Switching speed enhancement of the LDMOSFETs using partial-SOI technology

To overcome reduced breakdown voltage and self-heating effects inherent in silicon-on-insulator (SOI) power integrated circuits while still maintaining good isolation between low power CMOS circuits and the high power cells, partial SOI (PSOI) technology has been proposed. PSOI devices make use of both buried oxide and substrate depletion to support the breakdown voltage. 2D analyses and modeling of parasitic capacitances in PSOI structures show that PSOI-lightly doped MOSFETs can increase the switching speed by as much as four times compared to conventional SOI structures, making them very attractive for high switching applications.

SOI diode temperature sensor operated at ultra high temperatures-a critical analysis

This paper investigates the performance of diode temperature sensors when operated at ultra high temperatures (above 250°C). A low leakage Silicon On Insulator (SOI) diode was designed and fabricated in a 1 μm CMOS process and suspended within a dielectric membrane for efficient thermal insulation. The diode can be used for accurate temperature monitoring in a variety of sensors such as microcalorimeters, IR detectors, or thermal flow sensors. A CMOS compatible micro-heater was integrated with the diode for local heating. It was found that the diode forward voltage exhibited a linear dependence on temperature as long as the reverse saturation current remained below the forward driving current. We have proven experimentally that the maximum temperature can be as high as 550°C. Long term continuous operation at high temperatures (400°C) showed good stability of the voltage drop. Furthermore, we carried out a detailed theoretical analysis to determine the maximum operating temperature and exlain the presence of nonlinearity factors at ultra high temperatures. © 2008 IEEE.

Laminar to turbulent flow transition measurements using an array of SOI-CMOS MEMS wall shear stress sensors

The successful utilization of an array of silicon on insulator complementary metal oxide semiconductor (SOICMOS) micro thermal shear stress sensors for flow measurements at macro-scale is demonstrated. The sensors use CMOS aluminum metallization as the sensing material and are embedded in low thermal conductivity silicon oxide membranes. They have been fabricated using a commercial 1 μm SOI-CMOS process and a post-CMOS DRIE back etch. The sensors with two different sizes were evaluated. The small sensors (18.5 ×18.5 μm2 sensing area on 266 × 266 μm2 oxide membrane) have an ultra low power (100 °C temperature rise at 6mW) and a small time constant of only 5.46 μs which corresponds to a cut-off frequency of 122 kHz. The large sensors (130 × 130 μm2 sensing area on 500 × 500 μm2 membrane) have a time constant of 9.82 μs (cut-off frequency of 67.9 kHz). The sensors' performance has proven to be robust under transonic and supersonic flow conditions. Also, they have successfully identified laminar, separated, transitional and turbulent boundary layers in a low speed flow. © 2008 IEEE.

SOI membrane-based pressure sensor in stress sensitive differential amplifier configuration

This paper introduces a pressure sensing structure configured as a stress sensitive differential amplifier (SSDA), built on a Silicon-on-Insulator (SOI) membrane. Theoretical calculation show the significant increase in sensitivity which is expected from the pressure sensors in SSDA configuration compared to the traditional Wheatstone bridge circuit. Preliminary experimental measurements, performed on individual transistors placed on the membrane, exhibit state-the-art sensitivity values (1.45mV/mbar). © 2012 IEEE.

SOI sensing technologies for harsh environment

This paper reviews and addresses certain aspects of Silicon-On-Insulator (SOI) technologies for a harsh environment. The paper first describes the need for specialized sensors in applications such as (i) domestic and other small-scale boilers, (ii) CO2 Capture and Sequestration, (iii) oil & gas storage and transportation, and (iv) automotive. We describe in brief the advantages and special features of SOI technology for sensing applications requiring temperatures in excess of the typical bulk silicon junction temperatures of 150oC. Finally we present the concepts, structures and prototypes of simple and smart micro-hotplate and Infra Red (IR) based emitters for NDIR (Non Dispersive IR) gas sensors in harsh environments. © 2012 IEEE.

Electrical and optical properties of ion implanted SOI-based photonic crystals

We investigate the electrical properties of Silicon-on-Insulator photonic crystals as a function of doping level and air filling factor. A very interesting trade-off between conductivity and optical losses in L3 cavities is also found. © 2011 IEEE.

A thermopile based SOI CMOS MEMS wall shear stress sensor

In this paper we present for the first time, a novel silicon on insulator (SOI) complementary metal oxide semiconductor (CMOS) MEMS thermal wall shear stress sensor based on a tungsten hot-film and three thermopiles. These devices have been fabricated using a commercial 1 μm SOI-CMOS process followed by a deep reactive ion etch (DRIE) back-etch step to create silicon oxide membranes under the hot-film for effective thermal isolation. The sensors show an excellent repeatability of electro-thermal characteristics and can be used to measure wall shear stress in both constant current anemometric as well as calorimetric modes. The sensors have been calibrated for wall shear stress measurement of air in the range of 0-0.48 Pa using a suction type, 2-D flow wind tunnel. The calibration results show that the sensors have a higher sensitivity (up to four times) in calorimetric mode compared to anemometric mode for wall shear stress lower than 0.3 Pa. © 2013 IEEE.

Sub-nanosecond optical switch based on silicon racetrack resonator

We experimentally demonstrate a small-size and high-speed silicon optical switch based on the free carrier plasma dispersion in silicon. Using an embedded racetrack resonator with a quality factor of 7400, the optical switch shows an extinction ratio exceeding 13 dB with a footprint of only 2.2 x 10(-3) mm(2). Moreover, a novel pre-emphasis technique is introduced to improve the optical response performance and the rise and the fall times are reduced down to 0.24 ns and 0.42 ns respectively, which are 25% and 44% lower than those without the pre-emphasis.

Wafer-Level Testable High-Speed Silicon Microring Modulator Integrated with Grating Couplers

A wafer-level testable silicon-on-insulator-based microring modulator is demonstrated with high modulation speed, to which the grating couplers are integrated as the fiber-to-chip interfaces. Cost-efficient fabrications are realized with the help of optical structure and etching depth designs. Grating couplers and waveguides are patterned and etched together with the same slab thickness. Finally we obtain a 3-dB coupling bandwidth of about 60nm and 10 Gb/s nonreturn-to-zero modulation by wafer-level optical and electrical measurements.

Study of GaN growth on ultra-thin Si membranes

10 mu m-thick ultra-thin Si (111) membranes for GaN epi-layers growth were successfully fabricated on silicon-on-insulator (SOI) substrate by backside etching the handle Si and buried oxide (BOX) layer. Then 1 mu m-thick GaN layers were deposited on these Si membranes by metal-organic chemical vapor deposition (MOCVD). The crack-free areas of 250 mu m, x 250 mu m were obtained on the GaN layers due to the reduction of thermal stress by using these ultra-thin Si membranes, which was further confirmed by the photoluminescence (PL) spectra and the simulation results from the finite element method calculation by using the software of ANSYS. In this paper, a newly developed approach was demonstrated to utilize micromechanical structures for GaN growth, which would improve the material quality of the epi-layers and facilitate GaN-based micro electro-mechanical system (MEMS) fabrication, especially the pressure sensor, in the future applications. (C) 2008 Elsevier Ltd. All rights reserved.

High-speed 2 x 2 silicon-based electro-optic switch with nanosecond switch time

A 2 x 2 electro-optic switch is experimentally demonstrated using the optical structure of a Mach-Zehnder interferometer (MZI) based on a submicron rib waveguide and the electrical structure of a PIN diode on silicon-on-insulator (SOI). The switch behaviour is achieved through the plasma dispersion effect of silicon. The device has a modulation arm of I mm in length and cross-section of 400 nmx340 nm. The measurement results show that the switch has a V pi L pi figure of merit of 0.145 V-cm and the extinction ratios of two output ports and cross talk are 40 dB, 28 dB and -28 dB, respectively. A 3 dB modulation bandwidth of 90 MHz and a switch time of 6.8 ns for the rise edge and 2.7 ns for the fall edge are also demonstrated.

Multi-channel micro neural probe fabricated with SOI

Silicon-on-insulator (SOI) substrate is widely used in micro-electro-mechanical systems (MEMS). With the buried oxide layer of SOI acting as an etching stop, silicon based micro neural probe can be fabricated with improved uniformity and manufacturability. A seven-record-site neural probe was formed by inductive-coupled plasma (ICP) dry etching of an SOI substrate. The thickness of the probe is 15 mu m. The shaft of the probe has dimensions of 3 mmx100 mu mx15 mu m with typical area of the record site of 78.5 mu m(2). The impedance of the record site was measured in-vitro. The typical impedance characteristics of the record sites are around 2 M Omega at 1 kHz. The performance of the neural probe in-vivo was tested on anesthetic rat. The recorded neural spike was typically around 140 mu V. Spike from individual site could exceed 700 mu V. The average signal noise ratio was 7 or more.

Silicon-on-insulating multi-layers for total-dose irradiation hardness

Silicon-on-insulating multi-layer (SOIM) materials were fabricated by co-implantation of oxygen and nitrogen ions with different energies and doses. The multilayer microstructure was investigated by cross-sectional transmission electron microscopy. P-channel metal-oxide-semiconductor (PMOS) transistors and metal-semiconductor-insulator-semiconductor (MSIS) capacitors were produced by these materials. After the irradiated total dose reaches 3 x 10(5) rad (Si), the threshold voltage of the SOIM-based PMOS transistor only shifts 0.07 V, while thin silicon-on-insulating buried-oxide SIMOX-based PMOS transistors have a shift of 1.2V, where SIMOX represents the separated by implanted oxygen. The difference of capacitance of the SOIM-based MSIS capacitors before and after irradiation is less than that of the thin-box SIMOX-based MSIS capacitor. The results suggest that the SOIM materials have a more remarkable irradiation tolerance of total dose effect, compared to the thin-buried-oxide SIMOX materials.