Progress in the evaluation of transgenic fish for possible ecological risk and its containment strategies

Genetically improved transgenic fish possess many beneficial economic traits; however, the commercial aquaculture of transgenic fish has not been performed till date. One of the major reasons for this is the possible ecological risk associated with the escape or release of the transgenic fish. Using a growth hormone transgenic fish with rapid growth characteristics as a subject, this paper analyzes the following: the essence of the potential ecological risks posed by transgenic fish; ecological risk in the current situation due to transgenic fish via one-factor phenotypic and fitness analysis, and mathematical model deduction. Then, it expounds new ideas and the latest findings using an artificially simulated ecosystem for the evaluation of the ecological risks posed by transgenic fish. Further, the study comments on the strategies and principles of controlling these ecological risks by using a triplold approach. Based on these results, we propose that ecological risk evaluation and prevention strategies are indispensable important components and should be accompanied with breeding research in order to provide enlightments for transgenic fish breeding, evaluation of the ecological risks posed by transgenic fish, and development of containment strategies against the risks.

Compact Reconfigurable Binary-Decision-Diagram Logic Circuit on a GaAs Nanowire Network

We describe a reconfigurable binary-decision-diagram logic circuit based on Shannon's expansion of Boolean logic function and its graphical representation on a semiconductor nanowire network. The circuit is reconfigured by using programmable switches that electrically connect and disconnect a small number of branches. This circuit has a compact structure with a small number of devices compared with the conventional look-up table architecture. A variable Boolean logic circuit was fabricated on an etched GaAs nanowire network having hexagonal topology with Schottky wrap gates and SiN-based programmable switches, and its correct logic operation together with dynamic reconfiguration was demonstrated.

Performing Fast Addition and Multiplication by Transferring Single Electrons

This paper proposes novel fast addition and multiplication circuits that are based on non-binary redundant number systems and single electron (SE) devices. The circuits consist of MOSFET-based single-electron (SE) turnstiles. We use the number of electrons to represent discrete multiple-valued logic states and we finish arithmetic operations by controlling the number of electrons transferred. We construct a compact PD2,3 adder and a 12x12bit multiplier using the PD2,3 adder. The speed of the adder can be as high as 600MHz with 400nW power dissipation. The speed of the adder is regardless of its operand length. The proposed circuits have much smaller transistors than conventional circuits.

An Embedded Ultra Low Power Nonvolatile Memory in a Standard CMOS Logic Process

This paper proposes an embedded ultra low power nonvolatile memory in a standard CMOS logic process. The memory adopts a bit cell based on the differential floating gate PMOS structure and a novel operating scheme. It can greatly improve the endurance and retention characteristic and make the area/bit smaller. A new high efficiency all-PMOS charge pump is designed to reduce the power consumption and to increase the power efficiency. It eliminates the body effect and can generate higher output voltage than conventional structures for a same stage number. A 32-bit prototype chip is fabricated in a 0.18 mu m 1P4M standard CMOS logic process and the core area is 0.06 mm(2). The measured results indicate that the typical write/erase time is 10ms. With a 700 kHz clock frequency, power consumption of the whole memory is 2.3 mu A for program and 1.2 mu A for read at a 1.6V power supply.

Representation, comparison, and interpretation of metabolome fingerprint data for total composition analysis and quality trait investigation in potato cultivars

Manfred Beckmann, David P. Enot, David P. Overy, and John Draper (2007). Representation, comparison, and interpretation of metabolome fingerprint data for total composition analysis and quality trait investigation in potato cultivars. Journal of Agricultural and Food Chemistry, 55 (9) pp.3444-3451 RAE2008

Systematic delay-driven power optimisation and power-driven delay optimisation of combinational circuits

With the proliferation of mobile wireless communication and embedded systems, the energy efficiency becomes a major design constraint. The dissipated energy is often referred as the product of power dissipation and the input-output delay. Most of electronic design automation techniques focus on optimising only one of these parameters either power or delay. Industry standard design flows integrate systematic methods of optimising either area or timing while for power consumption optimisation one often employs heuristics which are characteristic to a specific design. In this work we answer three questions in our quest to provide a systematic approach to joint power and delay Optimisation. The first question of our research is: How to build a design flow which incorporates academic and industry standard design flows for power optimisation? To address this question, we use a reference design flow provided by Synopsys and integrate in this flow academic tools and methodologies. The proposed design flow is used as a platform for analysing some novel algorithms and methodologies for optimisation in the context of digital circuits. The second question we answer is: Is possible to apply a systematic approach for power optimisation in the context of combinational digital circuits? The starting point is a selection of a suitable data structure which can easily incorporate information about delay, power, area and which then allows optimisation algorithms to be applied. In particular we address the implications of a systematic power optimisation methodologies and the potential degradation of other (often conflicting) parameters such as area or the delay of implementation. Finally, the third question which this thesis attempts to answer is: Is there a systematic approach for multi-objective optimisation of delay and power? A delay-driven power and power-driven delay optimisation is proposed in order to have balanced delay and power values. This implies that each power optimisation step is not only constrained by the decrease in power but also the increase in delay. Similarly, each delay optimisation step is not only governed with the decrease in delay but also the increase in power. The goal is to obtain multi-objective optimisation of digital circuits where the two conflicting objectives are power and delay. The logic synthesis and optimisation methodology is based on AND-Inverter Graphs (AIGs) which represent the functionality of the circuit. The switching activities and arrival times of circuit nodes are annotated onto an AND-Inverter Graph under the zero and a non-zero-delay model. We introduce then several reordering rules which are applied on the AIG nodes to minimise switching power or longest path delay of the circuit at the pre-technology mapping level. The academic Electronic Design Automation (EDA) tool ABC is used for the manipulation of AND-Inverter Graphs. We have implemented various combinatorial optimisation algorithms often used in Electronic Design Automation such as Simulated Annealing and Uniform Cost Search Algorithm. Simulated Annealing (SMA) is a probabilistic meta heuristic for the global optimization problem of locating a good approximation to the global optimum of a given function in a large search space. We used SMA to probabilistically decide between moving from one optimised solution to another such that the dynamic power is optimised under given delay constraints and the delay is optimised under given power constraints. A good approximation to the global optimum solution of energy constraint is obtained. Uniform Cost Search (UCS) is a tree search algorithm used for traversing or searching a weighted tree, tree structure, or graph. We have used Uniform Cost Search Algorithm to search within the AIG network, a specific AIG node order for the reordering rules application. After the reordering rules application, the AIG network is mapped to an AIG netlist using specific library cells. Our approach combines network re-structuring, AIG nodes reordering, dynamic power and longest path delay estimation and optimisation and finally technology mapping to an AIG netlist. A set of MCNC Benchmark circuits and large combinational circuits up to 100,000 gates have been used to validate our methodology. Comparisons for power and delay optimisation are made with the best synthesis scripts used in ABC. Reduction of 23% in power and 15% in delay with minimal overhead is achieved, compared to the best known ABC results. Also, our approach is also implemented on a number of processors with combinational and sequential components and significant savings are achieved.

Functional imaging of numerical processing in adults and 4-y-old children.

Adult humans, infants, pre-school children, and non-human animals appear to share a system of approximate numerical processing for non-symbolic stimuli such as arrays of dots or sequences of tones. Behavioral studies of adult humans implicate a link between these non-symbolic numerical abilities and symbolic numerical processing (e.g., similar distance effects in accuracy and reaction-time for arrays of dots and Arabic numerals). However, neuroimaging studies have remained inconclusive on the neural basis of this link. The intraparietal sulcus (IPS) is known to respond selectively to symbolic numerical stimuli such as Arabic numerals. Recent studies, however, have arrived at conflicting conclusions regarding the role of the IPS in processing non-symbolic, numerosity arrays in adulthood, and very little is known about the brain basis of numerical processing early in development. Addressing the question of whether there is an early-developing neural basis for abstract numerical processing is essential for understanding the cognitive origins of our uniquely human capacity for math and science. Using functional magnetic resonance imaging (fMRI) at 4-Tesla and an event-related fMRI adaptation paradigm, we found that adults showed a greater IPS response to visual arrays that deviated from standard stimuli in their number of elements, than to stimuli that deviated in local element shape. These results support previous claims that there is a neurophysiological link between non-symbolic and symbolic numerical processing in adulthood. In parallel, we tested 4-y-old children with the same fMRI adaptation paradigm as adults to determine whether the neural locus of non-symbolic numerical activity in adults shows continuity in function over development. We found that the IPS responded to numerical deviants similarly in 4-y-old children and adults. To our knowledge, this is the first evidence that the neural locus of adult numerical cognition takes form early in development, prior to sophisticated symbolic numerical experience. More broadly, this is also, to our knowledge, the first cognitive fMRI study to test healthy children as young as 4 y, providing new insights into the neurophysiology of human cognitive development.

Elucidation of hepatitis C virus transmission and early diversification by single genome sequencing.

A precise molecular identification of transmitted hepatitis C virus (HCV) genomes could illuminate key aspects of transmission biology, immunopathogenesis and natural history. We used single genome sequencing of 2,922 half or quarter genomes from plasma viral RNA to identify transmitted/founder (T/F) viruses in 17 subjects with acute community-acquired HCV infection. Sequences from 13 of 17 acute subjects, but none of 14 chronic controls, exhibited one or more discrete low diversity viral lineages. Sequences within each lineage generally revealed a star-like phylogeny of mutations that coalesced to unambiguous T/F viral genomes. Numbers of transmitted viruses leading to productive clinical infection were estimated to range from 1 to 37 or more (median = 4). Four acutely infected subjects showed a distinctly different pattern of virus diversity that deviated from a star-like phylogeny. In these cases, empirical analysis and mathematical modeling suggested high multiplicity virus transmission from individuals who themselves were acutely infected or had experienced a virus population bottleneck due to antiviral drug therapy. These results provide new quantitative and qualitative insights into HCV transmission, revealing for the first time virus-host interactions that successful vaccines or treatment interventions will need to overcome. Our findings further suggest a novel experimental strategy for identifying full-length T/F genomes for proteome-wide analyses of HCV biology and adaptation to antiviral drug or immune pressures.

Symmetrical freedom quilts: the ethnomathematics of ways of communication, liberation, and art

Symmetrical Freedom Quilts may be considered as links between mathematics, history, ethnomathematics, and the art of quilting. A quilt theme is a pedagogical way to integrate mathematics, art, and history in an interdisciplinary approach. This article combines an ethnomathematical-historical perspective by elaborating a history project related to the Underground Railroad. This work will allow teachers to develop classroom projects that help students to better understand geometry, especially concepts of symmetry and transformations. One of the objectives of this project is to stimulate student’s creativity and interest, because quilts may be considered as cultural and mathematical expressions of student’s daily life.

Teaching, learning and assessment in MSc. Databases units at University of Greenwich

In this paper we look at ways of delivering and assessing learning on database units offered on higher degree programmes (MSc) in the School of Computing and Mathematical Sciences at the University of Greenwich. Of critical importance is the teaching methods employed for verbal disposition, practical laboratory exercises and a careful evaluation of assessment methods and assessment tools in view of the fact that databases involve not only database design but also use of practical tools, such as database management systems (DBMSs) software, human designers, database administrators (DBA) and end users. Our goal is to clearly identify potential key success factors in delivering and assessing learning in both practical and theoretical aspects of database course units.

Coursework uploads and zero-tolerance deadlines

Clear assessment deadlines and severe penalties for late submission of coursework are a feature of a number of UK universities. This presents a severe challenge for any online upload system. Evidence from a range of different implementations at the School of Computing and Mathematical Sciences at the University of Greenwich over the past few years is examined to assess the impact of a zero-tolerance deadline policy on the way students work and the problems that arise. Suggestions are made on how to minimise any possible negative impact of a zero-tolerance deadline policy on the administration of the system and on staff and students.

A method of false coincidence removal from measurements of quadruple coincidences between two photoelectrons and two photoions generated in molecular double photoionization

The removal of false coincidences from measurements of coincidences between two photoelectrons and one or two ions formed in molecular double photoionization is described. False coincidences arise by several mechanisms; experimental procedures and mathematical formulae required to remove all the different false coincidence contributions are described. Sample spectra taken of the double photoionization of carbon dioxide are presented to illustrate the method of false coincidence subtraction.

Classical computation with quantum systems

As semiconductor electronic devices scale to the nanometer range and quantum structures (molecules, fullerenes, quantum dots, nanotubes) are investigated for use in information processing and storage, it, becomes useful to explore the limits imposed by quantum mechanics on classical computing. To formulate the problem of a quantum mechanical description of classical computing, electronic device and logic gates are described as quantum sub-systems with inputs treated as boundary conditions, outputs expressed.is operator expectation values, and transfer characteristics and logic operations expressed through the sub-system Hamiltonian. with constraints appropriate to the boundary conditions. This approach, naturally, leads to a description of the subsystem.,, in terms of density matrices. Application of the maximum entropy principle subject to the boundary conditions (inputs) allows for the determination of the density matrix (logic operation), and for calculation of expectation values of operators over a finite region (outputs). The method allows for in analysis of the static properties of quantum sub-systems.