926 resultados para controlled active front end rectifier


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In this paper we describe the development of a low-cost high-accuracy Galileo Code receiver, user application software and positioning algorithms for land management applications, which have been implemented using a dedicated FPGA board and dual frequency Galileo E5/L1 Radio Frequency Front-End. The current situation of rural property surveying in Brazil is described and the use of code measurements from the new Galileo signals E5 AltBOC combined with E1 MBOC for use in land management applications is explored. We explain how such approach is expected to allow delivering an absolute positioning solution which could bridge the gap between receivers of high cost/complexity/accuracy based on carrier phase and receivers of lower cost/accuracy based on pseudorange observables. The system is presented together with a detailed description of main components: the Code Receiver and the Application Software. The work presented is part of an ongoing European-Brazilian consortium effort to explore the use of new Galileo for land management applications in Brazil and sponsored by the GNSS Supervisory Authority (GSA).

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Pós-graduação em Televisão Digital: Informação e Conhecimento - FAAC

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Para compor um sistema de Reconhecimento Automático de Voz, pode ser utilizada uma tarefa chamada Classificação Fonética, onde a partir de uma amostra de voz decide-se qual fonema foi emitido por um interlocutor. Para facilitar a classificação e realçar as características mais marcantes dos fonemas, normalmente, as amostras de voz são pré- processadas através de um fronl-en'L Um fron:-end, geralmente, extrai um conjunto de parâmetros para cada amostra de voz. Após este processamento, estes parâmetros são insendos em um algoritmo classificador que (já devidamente treinado) procurará decidir qual o fonema emitido. Existe uma tendência de que quanto maior a quantidade de parâmetros utilizados no sistema, melhor será a taxa de acertos na classificação. A contrapartida para esta tendência é o maior custo computacional envolvido. A técnica de Seleção de Parâmetros tem como função mostrar quais os parâmetros mais relevantes (ou mais utilizados) em uma tarefa de classificação, possibilitando, assim, descobrir quais os parâmetros redundantes, que trazem pouca (ou nenhuma) contribuição à tarefa de classificação. A proposta deste trabalho é aplicar o classificador SVM à classificação fonética, utilizando a base de dados TIMIT, e descobrir os parâmetros mais relevantes na classificação, aplicando a técnica Boosting de Seleção de Parâmetros.

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Esta tese apresenta duas contribuições distintas na área de sistemas de comunicações sem fi o. Primeiro, é apresentada uma formulação analítica para a análise de desempenho de sistemas utilizando multiplexação multibanda por divisão ortogonal na frequência (MB-OFDM, do inglês Multi-Band Orthogonal Frequency-Division Multiplexing ) com um ltro notch para mitigar a interferência em banda estreita causada por outros sistemas que operam dentro da faixa de frequências alocada para sistemas UWB. Em seguida, um novo front end para classificação automática de modulações com o uso de aprendizado discriminativo é proposto. Esse front end pode ser utilizado por qualquer classi cador discriminativo e consiste em ordenar magnitude e fase do símbolos recebidos. Os resultados obtidos pelo classi cador proposto mostraram-se competitivos com outros algoritmos já existentes na literatura.

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Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

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Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

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Telecommunications have been in constant evolution during past decades. Among the technological innovations, the use of digital technologies is very relevant. Digital communication systems have proven their efficiency and brought a new element in the chain of signal transmitting and receiving, the digital processor. This device offers to new radio equipments the flexibility of a programmable system. Nowadays, the behavior of a communication system can be modified by simply changing its software. This gave rising to a new radio model called Software Defined Radio (or Software-Defined Radio - SDR). In this new model, one moves to the software the task to set radio behavior, leaving to hardware only the implementation of RF front-end. Thus, the radio is no longer static, defined by their circuits and becomes a dynamic element, which may change their operating characteristics, such as bandwidth, modulation, coding rate, even modified during runtime according to software configuration. This article aims to present the use of GNU Radio software, an open-source solution for SDR specific applications, as a tool for development configurable digital radio.

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The sustained demand for faster,more powerful chips has beenmet by the availability of chip manufacturing processes allowing for the integration of increasing numbers of computation units onto a single die. The resulting outcome, especially in the embedded domain, has often been called SYSTEM-ON-CHIP (SOC) or MULTI-PROCESSOR SYSTEM-ON-CHIP (MPSOC). MPSoC design brings to the foreground a large number of challenges, one of the most prominent of which is the design of the chip interconnection. With a number of on-chip blocks presently ranging in the tens, and quickly approaching the hundreds, the novel issue of how to best provide on-chip communication resources is clearly felt. NETWORKS-ON-CHIPS (NOCS) are the most comprehensive and scalable answer to this design concern. By bringing large-scale networking concepts to the on-chip domain, they guarantee a structured answer to present and future communication requirements. The point-to-point connection and packet switching paradigms they involve are also of great help in minimizing wiring overhead and physical routing issues. However, as with any technology of recent inception, NoC design is still an evolving discipline. Several main areas of interest require deep investigation for NoCs to become viable solutions: • The design of the NoC architecture needs to strike the best tradeoff among performance, features and the tight area and power constraints of the on-chip domain. • Simulation and verification infrastructure must be put in place to explore, validate and optimize the NoC performance. • NoCs offer a huge design space, thanks to their extreme customizability in terms of topology and architectural parameters. Design tools are needed to prune this space and pick the best solutions. • Even more so given their global, distributed nature, it is essential to evaluate the physical implementation of NoCs to evaluate their suitability for next-generation designs and their area and power costs. This dissertation focuses on all of the above points, by describing a NoC architectural implementation called ×pipes; a NoC simulation environment within a cycle-accurate MPSoC emulator called MPARM; a NoC design flow consisting of a front-end tool for optimal NoC instantiation, called SunFloor, and a set of back-end facilities for the study of NoC physical implementations. This dissertation proves the viability of NoCs for current and upcoming designs, by outlining their advantages (alongwith a fewtradeoffs) and by providing a full NoC implementation framework. It also presents some examples of additional extensions of NoCs, allowing e.g. for increased fault tolerance, and outlines where NoCsmay find further application scenarios, such as in stacked chips.

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The Ph.D. thesis describes the simulations of different microwave links from the transmitter to the receiver intermediate-frequency ports, by means of a rigorous circuit-level nonlinear analysis approach coupled with the electromagnetic characterization of the transmitter and receiver front ends. This includes a full electromagnetic computation of the radiated far field which is used to establish the connection between transmitter and receiver. Digitally modulated radio-frequency drive is treated by a modulation-oriented harmonic-balance method based on Krylov-subspace model-order reduction to allow the handling of large-size front ends. Different examples of links have been presented: an End-to-End link simulated by making use of an artificial neural network model; the latter allows a fast computation of the link itself when driven by long sequences of the order of millions of samples. In this way a meaningful evaluation of such link performance aspects as the bit error rate becomes possible at the circuit level. Subsequently, a work focused on the co-simulation an entire link including a realistic simulation of the radio channel has been presented. The channel has been characterized by means of a deterministic approach, such as Ray Tracing technique. Then, a 2x2 multiple-input multiple-output antenna link has been simulated; in this work near-field and far-field coupling between radiating elements, as well as the environment factors, has been rigorously taken into account. Finally, within the scope to simulate an entire ultra-wideband link, the transmitting side of an ultrawideband link has been designed, and an interesting Front-End co-design technique application has been setup.

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ALICE, that is an experiment held at CERN using the LHC, is specialized in analyzing lead-ion collisions. ALICE will study the properties of quarkgluon plasma, a state of matter where quarks and gluons, under conditions of very high temperatures and densities, are no longer confined inside hadrons. Such a state of matter probably existed just after the Big Bang, before particles such as protons and neutrons were formed. The SDD detector, one of the ALICE subdetectors, is part of the ITS that is composed by 6 cylindrical layers with the innermost one attached to the beam pipe. The ITS tracks and identifies particles near the interaction point, it also aligns the tracks of the articles detected by more external detectors. The two ITS middle layers contain the whole 260 SDD detectors. A multichannel readout board, called CARLOSrx, receives at the same time the data coming from 12 SDD detectors. In total there are 24 CARLOSrx boards needed to read data coming from all the SDD modules (detector plus front end electronics). CARLOSrx packs data coming from the front end electronics through optical link connections, it stores them in a large data FIFO and then it sends them to the DAQ system. Each CARLOSrx is composed by two boards. One is called CARLOSrx data, that reads data coming from the SDD detectors and configures the FEE; the other one is called CARLOSrx clock, that sends the clock signal to all the FEE. This thesis contains a description of the hardware design and firmware features of both CARLOSrx data and CARLOSrx clock boards, which deal with all the SDD readout chain. A description of the software tools necessary to test and configure the front end electronics will be presented at the end of the thesis.

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The advent of distributed and heterogeneous systems has laid the foundation for the birth of new architectural paradigms, in which many separated and autonomous entities collaborate and interact to the aim of achieving complex strategic goals, impossible to be accomplished on their own. A non exhaustive list of systems targeted by such paradigms includes Business Process Management, Clinical Guidelines and Careflow Protocols, Service-Oriented and Multi-Agent Systems. It is largely recognized that engineering these systems requires novel modeling techniques. In particular, many authors are claiming that an open, declarative perspective is needed to complement the closed, procedural nature of the state of the art specification languages. For example, the ConDec language has been recently proposed to target the declarative and open specification of Business Processes, overcoming the over-specification and over-constraining issues of classical procedural approaches. On the one hand, the success of such novel modeling languages strongly depends on their usability by non-IT savvy: they must provide an appealing, intuitive graphical front-end. On the other hand, they must be prone to verification, in order to guarantee the trustworthiness and reliability of the developed model, as well as to ensure that the actual executions of the system effectively comply with it. In this dissertation, we claim that Computational Logic is a suitable framework for dealing with the specification, verification, execution, monitoring and analysis of these systems. We propose to adopt an extended version of the ConDec language for specifying interaction models with a declarative, open flavor. We show how all the (extended) ConDec constructs can be automatically translated to the CLIMB Computational Logic-based language, and illustrate how its corresponding reasoning techniques can be successfully exploited to provide support and verification capabilities along the whole life cycle of the targeted systems.

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ZusammenfassungDie selbstkondensierende Gruppenübertragungspolymerisation von 2-[(2-Methyl-1-triethylsiloxy-1-propenyl)oxy]ethyl-methacrylat (MTSHEMA) und die Copolymerisation mit Methylmethacrylat und tert-Butylmethacrylat wurde untersucht. Da MTSHEMA eine polymerisierbare Methacryloyl-Einheit und eine zur Initiierung einer Gruppenübertragungspolymerisation befähigte Silylketenacetal-Einheit besitzt, führt die Homopolymerisation zu hyperverzweigten und die Copolymerisation zu hochverzweigten Polymeren.Bei der Homopolymerisation von MTSHEMA konnten nur niedrige Molekulargewichte erreicht werden. Dies wird auf Nebenreaktionen der aktiven Kettenenden zurückgeführt, welche die Carbonylgruppen nucleophil angreifen und, mit der Doppelbindung Kern-Einheit reagieren. Die Copolymerisation mit Methylmethacrylat verlauft ohne Nebenreaktionen. Durch die Variation des molaren Verhältnisses von MTSHEMA zu den Comonomeren war es möglich, das Molekulargewicht, den Verzweigungsgrad und dadurch die Viskosität in Lösung zu kontrollieren. Die Bestimmung der Molekulargewichtsverteilung sämtlicher Polymere erfolgte durch Kopplung der Gelpermeationschromatographie mit einem Viskositätsdetektor und einem Vielwinkel Lichtstreu-Photometer. Die aus dem Vergleich der Viskositäten und Trägheitsradien ermittelten Schrumpfungspa-rameter lassen Schlüsse auf den Verzweigungsgrad zu.Nach den Ergebnissen der viskoelastischen Spektroskopie folgt das Verhalten der verzweigten Polymere in der Schmelze der Rouse-Theorie und deutet damit auf die Abwesenheit von Verschlaufungen hin.Durch die Copolymerisation mit tert-Butylmethacrylat und MTSHEMA konnte hochverzweigtes Poly(tert-butylmethacrylat) synthetisiert werden. Die Verseifung dieser Polymere ergab verzweigte Polymethacrylsäure.

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In questa tesi è stato realizzato un sistema web-based, per la configurazione di modelli meccanici tridimensionali. L’intero software è basato su architettura multi-tier. Il back-end espone servizi RESTful che permettono l’interrogazione di una base di dati contenente l’anagrafica dei modelli e l’interazione con il CAD 3D SolidWorks. Il front-end è rappresentato da due pagine HTML ideate come SPA (Single Page Application), una per l’amministratore e l’altra per l’utente finale; esse sono responsabili delle chiamate asincrone verso i servizi, dell’aggiornamento automatico dell’interfaccia e dell’interazione con immagini tridimensionali.

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Thermal effects are rapidly gaining importance in nanometer heterogeneous integrated systems. Increased power density, coupled with spatio-temporal variability of chip workload, cause lateral and vertical temperature non-uniformities (variations) in the chip structure. The assumption of an uniform temperature for a large circuit leads to inaccurate determination of key design parameters. To improve design quality, we need precise estimation of temperature at detailed spatial resolution which is very computationally intensive. Consequently, thermal analysis of the designs needs to be done at multiple levels of granularity. To further investigate the flow of chip/package thermal analysis we exploit the Intel Single Chip Cloud Computer (SCC) and propose a methodology for calibration of SCC on-die temperature sensors. We also develop an infrastructure for online monitoring of SCC temperature sensor readings and SCC power consumption. Having the thermal simulation tool in hand, we propose MiMAPT, an approach for analyzing delay, power and temperature in digital integrated circuits. MiMAPT integrates seamlessly into industrial Front-end and Back-end chip design flows. It accounts for temperature non-uniformities and self-heating while performing analysis. Furthermore, we extend the temperature variation aware analysis of designs to 3D MPSoCs with Wide-I/O DRAM. We improve the DRAM refresh power by considering the lateral and vertical temperature variations in the 3D structure and adapting the per-DRAM-bank refresh period accordingly. We develop an advanced virtual platform which models the performance, power, and thermal behavior of a 3D-integrated MPSoC with Wide-I/O DRAMs in detail. Moving towards real-world multi-core heterogeneous SoC designs, a reconfigurable heterogeneous platform (ZYNQ) is exploited to further study the performance and energy efficiency of various CPU-accelerator data sharing methods in heterogeneous hardware architectures. A complete hardware accelerator featuring clusters of OpenRISC CPUs, with dynamic address remapping capability is built and verified on a real hardware.

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This thesis was carried out inside the ESA's ESEO mission and focus in the design of one of the secondary payloads carried on board the spacecraft: a GNSS receiver for orbit determination. The purpose of this project is to test the technology of the orbit determination in real time applications by using commercial components. The architecture of the receiver includes a custom part, the navigation computer, and a commercial part, the front-end, from Novatel, with COCOM limitation removed, and a GNSS antenna. This choice is motivated by the goal of demonstrating the correct operations in orbit, enabling a widespread use of this technology while lowering the cost and time of the device’s assembly. The commercial front-end performs GNSS signal acquisition, tracking and data demodulation and provides raw GNSS data to the custom computer. This computer processes this raw observables, that will be both transferred to the On-Board Computer and then transmitted to Earth and provided as input to the recursive estimation filter on-board, in order to obtain an accurate positioning of the spacecraft, using the dynamic model. The main purpose of this thesis, is the detailed design and development of the mentioned GNSS receiver up to the ESEO project Critical Design Review, including requirements definition, hardware design and breadboard preliminary test phase design.