Seated portrait of Elisabeth Bell Portraits Women

Photographers stamp bottom left

Miraculous Survival 1939-1982

Description of war years in France and Spain, including experiences in internment camps, life in hiding, etc.; emigration to USA.

Schoolman family papers, undated, 1889-1994

The Schoolman Papers reflect Dr. Albert P. and Mrs. Bertha Schoolmans' staunch dedication to Jewish education, Jewish causes, and Israel. Bertha Schoolman, a lifelong member of Hadassah, assisted thousands of Israeli youth as chairman of the Youth Aliyah Committee. Her diaries, photos, scrapbooks, and correspondence record her numerous visits to Israel on which she helped set up schools, met with Israeli dignitaries, and participated in Zionist Conferences and events. The collection includes a 1936 letter from Hadassah founder, Henrietta Szold, praising Mrs. Schoolman's work as well as a letter from the father of Anne Frank, thanking Mrs. Schoolman for naming a Youth Aliyah center the "Anne Frank Haven" after his later daughter.

Ira S. Goldberg Collection 1954-1956

Letters to Ira Goldberg from Dora Edinger (1955), Paul P. Homburger (1955), The New York Public Library (1956) in reference to Bertha Pappenheim; article about stamp dedication by the German postal service honoring Bertha Pappenheim (in Allgemeine Wochenzeitung der Juden in Deutschland, 11/5/1954)

Land Contracts in Queensland [4th Edition]

"The authors analyse the substance of the transaction through the medium of the latest standard REIQ Residential, Commercial and Community Titles contracts, and draw on a comprehensive range of court decisions relating to the area. There are chapters covering contract formation including the role of the real estate agent, the disclosure regime for sellers and agents, subject matter, the inclusion of special conditions, risk, completion both through the paper based medium and electronic conveyancing and stamp duty and GST implications."--Publisher website

Roman Ingarden’s Objectivity vs. Subjectivity as a problem of Translatability

Ingarden (1962, 1964) postulates that artworks exist in an “Objective purely intentional” way. According to this view, objectivity and subjectivity are opposed forms of existence, parallel to the opposition between realism and idealism. Using arguments of cognitive science, experimental psychology, and semiotics, this lecture proposes that, particularly in the aesthetic phenomena, realism and idealism are not pure oppositions; rather they are aspects of a single process of cognition in different strata. Furthermore, the concept of realism can be conceived as an empirical extreme of idealism, and the concept of idealism can be conceived as a pre-operative extreme of realism. Both kind of systems of knowledge are mutually associated by a synecdoche, performing major tasks of mental order and categorisation. This contribution suggests that the supposed opposition between objectivity and subjectivity, raises, first of all, a problem of translatability, more than a problem of existential categories. Synecdoche seems to be a very basic transaction of the mind, establishing ontologies (in the more Ingardean way of the term). Wegrzecki (1994, 220) defines ontology as “the central domain of philosophy to which other its parts directly or indirectly refer”. Thus, ontology operates within philosophy as the synecdoche does within language, pointing the sense of the general into the particular and/or viceversa. The many affinities and similarities between different sign systems, like those found across the interrelationships of the arts, are embedded into a transversal, synecdochic intersemiosis. An important question, from this view, is whether Ingardean’s pure objectivities lie basically on the impossibility of translation, therefore being absolute self-referential constructions. In such a case, it would be impossible to translate pure intentionality into something else, like acts or products.

Improved utilisation of an HF transformer in DC–AC application

Power conversion using high frequency (HF) link converters is popular because of compact size and light weight of highfrequency transformer. This study focuses on improved utilisation of HF transformer in DC–AC applications. In practical application, the operating condition of the power converter deviates significantly from the designed considerations. These deviating factors are commutation requirements (dead-time, overlap), mismatch in device drops and presence of the fundamental frequency in load current. As a result, the HF transformer handles some amount of low-frequency components (including DC) other than desired HF components. This causes the operating point in B-H curve to shift away from its normal or idealised position and hence results poor utilisation of the HF transformer and unwanted losses. This study investigates the nature of the problem with experimental determination of approximate lumped parameter modelling and saturation behaviour (B-H curve) of the HF transformer. A simple closed-loop control algorithm with online tuning of the controller parameters is proposed to improve the utilisation of the isolation transformer. The simulation and experimental results are presented.

Variable Granularity Access Tracking Scheme for Improving the Performance of Software Transactional Memory

Software transactional memory (STM) has been proposed as a promising programming paradigm for shared memory multi-threaded programs as an alternative to conventional lock based synchronization primitives. Typical STM implementations employ a conflict detection scheme, which works with uniform access granularity, tracking shared data accesses either at word/cache line or at object level. It is well known that a single fixed access tracking granularity cannot meet the conflicting goals of reducing false conflicts without impacting concurrency adversely. A fine grained granularity while improving concurrency can have an adverse impact on performance due to lock aliasing, lock validation overheads, and additional cache pressure. On the other hand, a coarse grained granularity can impact performance due to reduced concurrency. Thus, in general, a fixed or uniform granularity access tracking (UGAT) scheme is application-unaware and rarely matches the access patterns of individual application or parts of an application, leading to sub-optimal performance for different parts of the application(s). In order to mitigate the disadvantages associated with UGAT scheme, we propose a Variable Granularity Access Tracking (VGAT) scheme in this paper. We propose a compiler based approach wherein the compiler uses inter-procedural whole program static analysis to select the access tracking granularity for different shared data structures of the application based on the application's data access pattern. We describe our prototype VGAT scheme, using TL2 as our STM implementation. Our experimental results reveal that VGAT-STM scheme can improve the application performance of STAMP benchmarks from 1.87% to up to 21.2%.

Interference Alignment in Regenerating Codes for Distributed Storage: Necessity and Code Constructions

Regenerating codes are a class of recently developed codes for distributed storage that, like Reed-Solomon codes, permit data recovery from any arbitrary of nodes. However regenerating codes possess in addition, the ability to repair a failed node by connecting to any arbitrary nodes and downloading an amount of data that is typically far less than the size of the data file. This amount of download is termed the repair bandwidth. Minimum storage regenerating (MSR) codes are a subclass of regenerating codes that require the least amount of network storage; every such code is a maximum distance separable (MDS) code. Further, when a replacement node stores data identical to that in the failed node, the repair is termed as exact. The four principal results of the paper are (a) the explicit construction of a class of MDS codes for d = n - 1 >= 2k - 1 termed the MISER code, that achieves the cut-set bound on the repair bandwidth for the exact repair of systematic nodes, (b) proof of the necessity of interference alignment in exact-repair MSR codes, (c) a proof showing the impossibility of constructing linear, exact-repair MSR codes for d < 2k - 3 in the absence of symbol extension, and (d) the construction, also explicit, of high-rate MSR codes for d = k+1. Interference alignment (IA) is a theme that runs throughout the paper: the MISER code is built on the principles of IA and IA is also a crucial component to the nonexistence proof for d < 2k - 3. To the best of our knowledge, the constructions presented in this paper are the first explicit constructions of regenerating codes that achieve the cut-set bound.

The canonic linear-phase FIR lattice structures

The Linear phase(LP) Finite Impulse Response(FIR) filters are widely used in many signal processing systems which are sensitive to phase distortion. In this article, we obtain a canonic lattice structure of an LP-FIR filter with a complex impulse response. This lattice structure is based on some novel lattice stages obtained from some properties of symmetric polynomials.This canonic lattice structure exploits the redundancy in the zeros of an LP-FIR filter.

Fragment Finder 2.0: a computing server to identify structurally similar fragments

Fragment Finder 2.0 is a web-based interactive computing server which can be used to retrieve structurally similar protein fragments from 25 and 90% nonredundant data sets. The computing server identifies structurally similar fragments using the protein backbone C alpha angles. In addition, the identified fragments can be superimposed using either of the two structural superposition programs, STAMP and PROFIT, provided in the server. The freely available Java plug-in Jmol has been interfaced with the server for the visualization of the query and superposed fragments. The server is the updated version of a previously developed search engine and employs an in-house-developed fast pattern matching algorithm. This server can be accessed freely over the World Wide Web through the URL http://cluster.physics.iisc.ernet.in/ff/.

Sequence-Structure Similarity: Do Sequentially Identical Peptide Fragments have Similar Three-Dimensional Structures?

The rapidly growing structure databases enhance the probability of finding identical sequences sharing structural similarity. Structure prediction methods are being used extensively to abridge the gap between known protein sequences and the solved structures which is essential to understand its specific biochemical and cellular functions. In this work, we plan to study the ambiguity between sequence-structure relationships and examine if sequentially identical peptide fragments adopt similar three-dimensional structures. Fragments of varying lengths (five to ten residues) were used to observe the behavior of sequence and its three-dimensional structures. The STAMP program was used to superpose the three-dimensional structures and the two parameters (Sequence Structure Similarity Score (Sc) and Root Mean Square Deviation value) were employed to classify them into three categories: similar, intermediate and dissimilar structures. Furthermore, the same approach was carried out on all the three-dimensional protein structures solved in the two organisms, Mycobacterium tuberculosis and Plasmodium falciparum to validate our results.

Making STMs Cache Friendly with Compiler Transformations

Software transactional memory (STM) is a promising programming paradigm for shared memory multithreaded programs. In order for STMs to be adopted widely for performance critical software, understanding and improving the cache performance of applications running on STM becomes increasingly crucial, as the performance gap between processor and memory continues to grow. In this paper, we present the most detailed experimental evaluation to date, of the cache behavior of STM applications and quantify the impact of the different STM factors on the cache misses experienced by the applications. We find that STMs are not cache friendly, with the data cache stall cycles contributing to more than 50% of the execution cycles in a majority of the benchmarks. We find that on an average, misses occurring inside the STM account for 62% of total data cache miss latency cycles experienced by the applications and the cache performance is impacted adversely due to certain inherent characteristics of the STM itself. The above observations motivate us to propose a set of specific compiler transformations targeted at making the STMs cache friendly. We find that STM's fine grained and application unaware locking is a major contributor to its poor cache behavior. Hence we propose selective Lock Data co-location (LDC) and Redundant Lock Access Removal (RLAR) to address the lock access misses. We find that even transactions that are completely disjoint access parallel, suffer from costly coherence misses caused by the centralized global time stamp updates and hence we propose the Selective Per-Partition Time Stamp (SPTS) transformation to address this. We show that our transformations are effective in improving the cache behavior of STM applications by reducing the data cache miss latency by 20.15% to 37.14% and improving execution time by 18.32% to 33.12% in five of the 8 STAMP applications.

Control of switching surges due to energization of 765kV UHV transmission line

Reduction of switching surge over voltages allows an economic design of UHV transmission system with reduced insulation. The various means of switching surge over voltage control with pre-insertion resistors/closing resistors, shunt re-actors and controlled switching are illustrated. The switching surge over voltages during the energization of series compensated line are compared with uncompensated line. An Electromagnetic transients program has been developed for studying the effect of various means of control of switching transients during 765kV UHV transmission line energization. This paper presents the studies carried out on switching surges control in 765kV UHV transmission line energization.

Reconciling transactional conflicts with compiler's help

Software transactional memory(STM) is a promising programming paradigm for shared memory multithreaded programs. While STM offers the promise of being less error-prone and more programmer friendly compared to traditional lock-based synchronization, it also needs to be competitive in performance in order for it to be adopted in mainstream software. A major source of performance overheads in STM is transactional aborts. Conflict resolution and aborting a transaction typically happens at the transaction level which has the advantage that it is automatic and application agnostic. However it has a substantial disadvantage in that STM declares the entire transaction as conflicting and hence aborts it and re-executes it fully, instead of partially re-executing only those part(s) of the transaction, which have been affected due to the conflict. This "Re-execute Everything" approach has a significant adverse impact on STM performance. In order to mitigate the abort overheads, we propose a compiler aided Selective Reconciliation STM (SR-STM) scheme, wherein certain transactional conflicts can be reconciled by performing partial re-execution of the transaction. Ours is a selective hybrid approach which uses compiler analysis to identify those data accesses which are legal and profitable candidates for reconciliation and applies partial re-execution only to these candidates selectively while other conflicting data accesses are handled by the default STM approach of abort and full re-execution. We describe the compiler analysis and code transformations required for supporting selective reconciliation. We find that SR-STM is effective in reducing the transactional abort overheads by improving the performance for a set of five STAMP benchmarks by 12.58% on an average and up to 22.34%.