Space grown semi-insulating gallium arsenide single crystal and its application

Low noise field effect transistors and analogue switch integrated circuits (ICs) have been fabricated in semi-insulating gallium arsenide (SI-GaAs) wafers grown in space by direct ion-implantation. The electrical behaviors of the devices and the ICs have surpassed those fabricated in the terrestrially grown SI-GaAs wafers. The highest gain and the lowest noise of the transistors made from space-grown SI-GaAs wafers are 22.8 dB and 0.78 dB, respectively. The threshold back-gating voltage of the ICs made from space-grown SI-GaAs wafers is better than 8.5 V The con-elation between the characterizations of materials and devices is studied systematically. (C) 2002 COSPAR. Published by Elsevier Science Ltd. All rights reserved.

Comparison of field effect transistor characteristics between space-grown and earth-grown gallium arsenide single crystal substrates

Semi-insulating gallium arsenide single crystal grown in space has been used in fabricating low noise field effect transistors and analog switch integrated circuits by the direct ion-implantation technique. All key electrical properties of these transistors and integrated circuits have surpassed those made from conventional earth-grown gallium arsenide. This result shows that device-grade space-grown semiconducting single crystal has surpassed the best terrestrial counterparts. (C) 2001 American Institute of Physics.

Outer space grown semi-insulating GaAs and its applications

GaAs single crystal has been grown in recoverable satellite. Hall measurements indicate that the GaAs shows semi-insulating behavior. The structural properties of the crystal have been improved obviously, and their uniformity has been improved as well. The stoichiometry and its distribution in space-grown GaAs are improved greatly compared with the GaAs single crystal grown terrestrially. The properties of integrated circuits made by direct ion-implantation on space-grown GaAs are better than those made on ground-grown materials. These results show that the stoichiometry in semi-insulating GaAs seriously affects the properties of related devices.

Nanoelectronic Circuit Architectures Based on Single-Electron Turnstiles

Single-electron devices (SEDs) have ultra-low power dissipation and high integration density, which make them promising candidates as basic circuit elements of the next generation VLSI circuits. In this paper, we propose two novel circuit single-electron architectures: the single-electron simulated annealing algorithm (SAA) circuit and the single-electron cellular neural network (CNN). We used the MOSFET-based single-electron turnstile [1] as the basic circuit element. The SAA circuit consists of the voltage-controlled single-electron random number generator [2] and the single-electron multiple-valued memories (SEMVs) [3]. The random-number generation and variable variations in SAA are easily achieved by transferring electrons using the single-electron turnstile. The CNN circuit used the floating-gate single-electron turnstile as the neural synapses, and the number of electrons is used to represent the cells states. These novel circuits are promising in future nanoscale integrated circuits.

Packing LUT clusters with network flow programming

This paper describes a two-step packing algorithm for LUT clusters of which the LUT input multipliers are depopulated. In the first step, a greedy algorithm is used to search for BLE locations and cluster inputs. If the greedy algorithm fails, the second step with network flow programming algorithm is employed. Numerical results illustrate that our two-step packing algorithm obtains better packing density than one-step greedy packing algorithm.

Implantable Microsystem for Wireless Neural Recording Applications

A prototype microsystem is presented for wireless neural recording application. An inductive link was built for transcutaneous wireless power transfer and data transmission. Total 16.5 mW power and 50 bps - 2.5 Kbps command data can be received over 1 - 5 MHz with a distance of 0-10 mm. The integrated amplifiers were designed with a limited bandwidth for neural signals acquisition. The gain of 60 dB was obtained by preamplifier at 7 Hz - 3 KHz. An integrated FM transmitter was used to transmit the extracted neural signals to external equipments with 0.374 - 2 mW power comsumption and a maximum data rate of 500 Kbps at 100 MHz. All the integrated circuits modules except the power recovery circuit were tested or stimulated under a 3.3 V power supply, and fabricated in standard CMOS processing.

A 5GHz low power WLAN transceiver SiGe RFIC for personal communication terminal applications

A low-cost low-power single chip WLAN 802.11a transceiver is designed for personal communication terminal and local multimedia data transmission. It has less than 130mA current dissipation, maximal 67dB gain and can be programmed to be 20dB minimal gain. The receiver system noise figure is 6.4dB in hige-gain mode.

The status, limits and countermeasures in the development of the silicon microelectronics industry

In this paper.. the status and limits in the development of the silicon microelectronics industry are presented briefly. The key countermeasures given are use of the new structure materials and the new device structures.

Effect of the implantation of fluorine on the mobility of channel electron for partially depleted SOI nMOSFET

The mobility of channel electron, for partially depleted Sol nMOSFET in this paper, decreases with the increase of implanted fluorine dose in buried oxide layer. But, the experimental results also show that it is larger for the transistor corresponding to the lowest implantation dose than no implanted fluorine in buried layer. It is explained in tern-is of a "lubricant" model. Mien fluorine atoms are implanted in the top silicon layer, the mobility is the largest. In addition, a positive shift of threshold voltage has also been observed for the transistors fabricated on the Sol wafers processed by the implantation of fluorine. The causes of all the above results are discussed.

High performance resonant tunneling diode on a new material structure

A new material structure with Al0.22Ga0.78As/In0.15Ga0.85As/GaAs emitter spacer layer and GaAs/In0.15Ga0.85As/GaAs well for resonant tunneling diodes is designed and the corresponding device is fabricated. RTDs DC characteristics are measured at room temperature. Peak-to-valley current ratio (PVCR) is 7.44 for RTD Analysis on these results suggests that the material structure will be helpful to improve the quality, of RTD.

Electronic states of InAs verfically-assembled quantum disks in magnetic fields and two-electron quantum-disk qubit

We have studied the single-electron and two-electron vertically-assembled quantum disks in an axial magnetic field using the effective mass approximation. The electron interaction is treated accurately by the direct diagonalization of the Hamiltonian matrix. We calculate the six criergy levels of single-electron quantum disks and the two lowest energy levels of two-electron quantum disks in an axial magnetic field. The change of the magnetic field as an effective potential strongly modifies the electronic structures. leading to splittings and crossings between levels The results demonstrate the switching between the around states with the total spins S = 0 and S = 1. The switching results in a qubit allowed to fabricate by current growth techniques.

Influence of fluorine on radiation-induced charge trapping in the SIMOX buried oxides

Charge trapping in the fluorinated SIMOX buried oxides before and after ionizing radiation has been investigated by means of C-V characteristics. Radiation-induced positive charge trapping which results in negative shift of C-V curves can be restrained by implanting fluorine ions into the SIMOX buried oxides. Pre-radiation charge trapping is suppressed in the fluorinated buried oxides. The fluorine dose and post-implantation anneal time play a very important role in the control of charge trapping.

Radiation response of partially-depleted MOS transistors fabricated in the fluorinated SIMOX wafers

Ionizing radiation response of partially-depleted MOS transistors fabricated in the, fluorinated SIMOX wafers has been investigated. The experimental data show that the, radiation-induced threshold voltage shift of PMOSFETs and NMOSFETs, as well as the radiation-induced increase of off-state leakage current of NMOSFETs can be restrained by implanting fluorine ions into the buried oxide of SIMOX wafers.

A simulation model of body contact structure in PD SOI analogue circuit

As a solution of accurate simulation of the body effect in PD SOI analogue circuit, a simulation model of distributed body contact resistance and parasitical capacitance is presented. Based on this model, we have designed and simulated a sense amplifier that applied to V a 0.8um PD SOI 64K SRAM.

A silicon capacitive microphone based on oxidized porous silicon sacrificial technology

In this paper, a new capacitive microphone fabrication technology is proposed. It describes using the oxidized porous silicon sacrificial technology to make air gap and using KOH etching technique to make the backplate containing acoustic holes based on the principle that the heavy p(+)-doping silicon can be nearly etched in KOH solution. The innovation of the method is using oxidized porous silicon technology. The sensitivity of the fabricated microphone is from -55dB ( 1.78mV/Pa) to -45dB (5.6mV/Pa) in the frequency range of 500Hz to 25kHz. Its cut-off frequency is higher than 20kHz.