994 resultados para tri-gate transistor structure


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Till date load-commutated inverter (LCI)-fed synchronous motor drive configuration is popular in high power applications (>10 MW). The leading power factor operation of synchronous motor by excitation control offers this simple and rugged drive structure. On the contrary, LCI-fed induction motor drive is absent as it always draws lagging power factor current. Therefore, complicated commutation circuit is required to switch off thyristors for a current source inverter (CSI)-driven induction motor. It poses the major hindrance to scale up the power rating of CSI-fed induction motor drive. Anew power topology for LCI-fed induction motor drive for medium-voltage drive application is proposed. A new induction machine (active-reactive induction machine) with two sets of three-phase winding is introduced as a drive motor. The proposed power configuration ensures sinusoidal voltage and current at the motor terminals. The total drive power is shared among a thyristor-based LCI, an insulated gate bipolar transistor (IGBT)-based two-level voltage source inverter (VSI), and a three-level VSI. The benefits of SCRs and IGBTs are explored in the proposed drive. Experimental results from a prototype drive verify the basic concepts of the drive.

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The performance characteristics of a junction field-effect transistor (j.f.e.t.) are evaluated considering the presence of the gap between the gate electrode and the source and drain terminals. It is concluded that the effect of the gap is to demand a higher drain voltage to maintain the same drain current. So long as the device is operated at the same drain current, the presence of the gap does not change the performance of the device as an amplifier. The nature of the performance of the device as a variable resistor is not affected by the gap if it is less than or equal to the physical height of the channel. For gap lengths larger than the channel height, the effect of the gap is to add a series resistance in the drain.

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DC reactive magnetron sputtering technique was employed for deposition of titanium dioxide (TiO2) films. The films were formed on Corning glass and p-Si (100) substrates by sputtering of titanium target in an oxygen partial pressure of 6x10-2 Pa and at different substrate temperatures in the range 303 673 K. The films formed at 303 K were X-ray amorphous whereas those deposited at substrate temperatures?=?473 K were transformed into polycrystalline nature with anatase phase of TiO2. Fourier transform infrared spectroscopic studies confirmed the presence of characteristic bonding configuration of TiO2. The surface morphology of the films was significantly influenced by the substrate temperature. MOS capacitor with Al/TiO2/p-Si sandwich structure was fabricated and performed currentvoltage and capacitancevoltage characteristics. At an applied gate voltage of 1.5 V, the leakage current density of the device decreased from 1.8?x?10-6 to 5.4?x?10-8 A/cm2 with the increase of substrate temperature from 303 to 673 K. The electrical conduction in the MOS structure was more predominant with Schottky emission and Fowler-Nordheim conduction. The dielectric constant (at 1 MHz) of the films increased from 6 to 20 with increase of substrate temperature. The optical band gap of the films increased from 3.50 to 3.56 eV and refractive index from 2.20 to 2.37 with the increase of substrate temperature from 303 to 673 K. Copyright (c) 2012 John Wiley & Sons, Ltd.

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We investigate the gate-controlled direct band-to-band tunneling (BTBT) current in a graphene-boron nitride (G-BN) heterobilayer channel-based tunnel field effect transistor. We first study the imaginary band structure of hexagonal and Bernal-stacked heterobilayers by density functional theory, which is then used to evaluate the gate-controlled current under the Wentzel-Kramers-Brillouin approximation. It is shown that the direct BTBT is probable for a certain interlayer spacing of the G-BN which depends on the stacking orders.

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We present electrical transport arid low frequency (1/f) noise measurements on mechanically exfoliated single, In and triLayer MoS2-based FPI devices on Si/SiO2 substrate. We find that tie electronic states hi MoS2 are localized at low temperatures (T) and conduction happens through variable range hopping (VRH). A steep increase of 1/f noise with decreasing T, typical for localized regime was observed in all of our devices. From gate voltage dependence of noise, we find that the noise power is inversely proportional to square of the number density (proportional to 1/n(2)) for a wide range of T, indicating number density fluctuations to be the dominant source of 1/f noise in these MoS2 FETs.

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HfO2 thin films deposited on Si substrate using electron beam evaporation, are evaluated for back-gated graphene transistors. The amount of O-2 flow rate, during vaporation is optimized for 35 nm thick HfO2 films, to achieve the best optical, chemical and electrical properties. It has been observed that with increasing oxygen flow rate, thickness of the films increased and refractive index decreased due to increase in porosity resulting from the scattering of the evaporant. The films deposited at low O-2 flow rates (1 and 3 SCCM) show better optical and compositional properties. The effects of post-deposition annealing and post-metallization annealing in forming gas ambience (FGA) on the optical and electrical properties of the films have been analyzed. The film deposited at 3 SCCM O-2 flow rate shows the best properties as measured on MOS capacitors. To evaluate the performance of device properties, back-gated bilayer graphene transistors on HfO2 films deposited at two O-2 flow rates of 3 and 20 SCCM have been fabricated and characterized. The transistor with HfO2 film deposited at 3 SCCM O-2 flow rate shows better electrical properties consistent with the observations on MOS capacitor structures. This suggests that an optimum oxygen pressure is necessary to get good quality films for high performance devices.

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Titanium dioxide (TiO2) thin films were deposited onto p-Si substrates held at room temperature by reactive Direct Current (DC) magnetron sputtering at various sputter powers in the range 80-200W. The as-deposited TiO2 films were annealed at a temperature of 1023K. The post-annealed films were characterized for crystallographic structure, chemical binding configuration, surface morphology and optical absorption. The electrical and dielectric properties of Al/TiO2/p-Si structure were determined from the capacitance-voltage and current-voltage characteristics. X-ray diffraction studies confirmed that the as-deposited films were amorphous in nature. After post-annealing at 1023K, the films formed at lower powers exhibited anatase phase, where as those deposited at sputter powers >160W showed the mixed anatase and rutile phases of TiO2. The surface morphology of the films varied significantly with the increase of sputter power. The electrical and dielectric properties on the air-annealed Al/TiO2/p-Si structures were studied. The effect of sputter power on the electrical and dielectric characteristics of the structure of Al/TiO2/p-Si (metal-insulator-semiconductor) was systematically investigated. Copyright (c) 2014 John Wiley & Sons, Ltd.

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In GaAs-based pseudomorphic high-electron mobility transistor device structures, strain and composition of the InxGa1 (-) As-x channel layer are very important as they influence the electronic properties of these devices. In this context, transmission electron microscopy techniques such as (002) dark-field imaging, high-resolution transmission electron microscopy (HRTEM) imaging, scanning transmission electron microscopy-high angle annular dark field (STEM-HAADF) imaging and selected area diffraction, are useful. A quantitative comparative study using these techniques is relevant for assessing the merits and limitations of the respective techniques. In this article, we have investigated strain and composition of the InxGa1 (-) As-x layer with the mentioned techniques and compared the results. The HRTEM images were investigated with strain state analysis. The indium content in this layer was quantified by HAADF imaging and correlated with STEM simulations. The studies showed that the InxGa1 (-) As-x channel layer was pseudomorphically grown leading to tetragonal strain along the 001] growth direction and that the average indium content (x) in the epilayer is similar to 0.12. We found consistency in the results obtained using various methods of analysis.

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DNA nanotubes are tubular structures composed of DNA crossover molecules. We present a bottom up approach for the construction and characterization of these structures. Various possible topologies of nanotubes are constructed such as 6-helix, 8-helix and tri-tubes with different sequences and lengths. We have used fully atomistic molecular dynamics simulations to study the structure, stability and elasticity of these structures. Several nanosecond long MD simulations give the microscopic details about DNA nanotubes. Based on the structural analysis of simulation data, we show that 6-helix nanotubes are stable and maintain their tubular structure; while 8-helix nanotubes are flattened to stabilize themselves. We also comment on the sequence dependence and the effect of overhangs. These structures are approximately four times more rigid having a stretch modulus of similar to 4000 pN compared to the stretch modulus of 1000 pN of a DNA double helix molecule of the same length and sequence. The stretch moduli of these nanotubes are also three times larger than those of PX/JX crossover DNA molecules which have stretch moduli in the range of 1500-2000 pN. The calculated persistence length is in the range of a few microns which is close to the reported experimental results on certain classes of DNA nanotubes.

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Titanium dioxide thin films were deposited by RF reactive magnetron sputtering technique on p-type silicon(100) substrates held at temperatures in the range 303-673 K. The influence of substrate temperature on the core level binding energies, chemical bonding configuration, crystallographic structure and dielectric properties was investigated. X-ray photoelectron spectroscopy studies and Fourier transform infrared transmittance data confirmed the formation of stoichiometric films with anatase phase at a substrate temperature of 673 K. The films formed at 303 K were nanocrystalline with amorphous matrix while those deposited at 673 K were transformed in to crystalline phase and growth of grains in pyramidal like structure as confirmed by X-ray diffraction and atomic force microscopy respectively. Metal-oxide-semiconductor capacitors were fabricated with the configuration of Al/TiO2/Si structures. The current voltage, capacitance voltage and conductance voltage characteristics were studied to understand the electrical conduction and dielectric properties of the MOS devices. The leakage current density (at gate voltage of 2 V) decreased from 2.2 x 10(-6) to 1.7 x 10(-7) A/cm(2), the interface trap density decreased from 1.2 x 10(13) to 2.1 x 10(12) cm(-2) eV(-1) and the dielectric constant increased from 14 to 36 with increase of substrate temperature from 303 to 673 K.

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The instability of an amorphous indium-gallium-zinc oxide (IGZO) field effect transistor is investigated upon water treatment. Electrical characteristics are measured before, immediately after and a few days after water treatment in ambient as well as in vacuum conditions. It is observed that after a few days of water exposure an IGZO field effect transistor (FET) shows relatively more stable behaviour as compared to before exposure. Transfer characteristics are found to shift negatively after immediate water exposure and in vacuum. More interestingly, after water exposure the off current is found to decrease by 1-2 orders of magnitude and remains stable even after 15 d of water exposure in ambient as well as in vacuum, whereas the on current more or less remains the same. An x-ray photoelectron spectroscopic study is carried out to investigate the qualitative and quantitative analysis of IGZO upon water exposure. The changes in the FET parameters are evaluated and attributed to the formation of excess oxygen vacancies and changes in the electronic structure of the IGZO bulk channel and at the IGZO/SiO2 interface, which can further lead to the formation of subgap states. An attempt is made to distinguish which parameters of the FET are affected by the changes in the electronic structure of the IGZO bulk channel and at the IGZO/SiO2 interface separately.

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Present paper is the first one in the series devoted to the dynamics of traveling waves emerging in the uncompressed, tri-atomic granular crystals. This work is primarily concerned with the dynamics of one-dimensional periodic granular trimer (tri-atomic) chains in the state of acoustic vacuum. Each unit cell consists of three spherical particles of different masses subject to periodic boundary conditions. Hertzian interaction law governs the mutual interaction of these particles. Under the assumption of zero pre-compression, this interaction is modeled as purely nonlinear, which means the absence of linear force component. The dynamics of such chains is governed by the two system parameters that scale the mass ratios between the particles of the unit cell. Such a system supports two different classes of periodic solutions namely the traveling and standing waves. The primary objective of the present study is the numerical analysis of the bifurcation structure of these solutions with emphasis on the dynamics of traveling waves. In fact, understanding of the bifurcation structure of the traveling wave solutions emerging in the unit-cell granular trimer is rather important and can shed light on the more complex nonlinear wave phenomena emerging in semi-infinite trimer chains. (c) 2016 Elsevier B.V. All rights reserved.

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We describe the fabrication of self-aligned split gate electrodes on suspended multiwalled carbon nanotube structures. A suspended multiwalled carbon nanotube structure was used as an evaporation mask for the deposition of metal electrodes resulting in the formation of discontinuous wire deposition. The metal deposits on the nanotubes are removed with lift-off due to the poor adhesion of metal to the nanotube surface. Using Al sacrificial layers, it was possible to fabricate self-aligned contact electrodes and control electrodes nanometers from the suspended carbon nanotubes with a single lithography step. It was also shown that the fabrication technique may also be used to form nano-gaped contact electrodes. The technique should prove useful for the fabrication of nano-electromechanical systems.

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We describe the fabrication of self-aligned split gate electrodes on suspended multiwalled carbon nanotube structures. A suspended multiwalled carbon nanotube structure was used as an evaporation mask for the deposition of metal electrodes resulting in the formation of discontinuous wire deposition. The metal deposits on the nanotubes are removed with lift-off due to the poor adhesion of metal to the nanotube surface. Using Al sacrificial layers, it was possible to fabricate self-aligned contact electrodes and control electrodes nanometers from the suspended carbon nanotubes with a single lithography step. It was also shown that the fabrication technique may also be used to form nano-gaped contact electrodes. The technique should prove useful for the fabrication of nano-electromechanical systems. © 2003 Materials Research Society.

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The subthreshold slope, transconductance, threshold voltage, and hysteresis of a carbon nanotube field-effect transistor (CNT FET) were examined as its configuration was changed from bottom-gate exposed channel, bottom-gate covered channel to top-gate FET. An individual single wall CNT was grown by chemical vapor deposition and its gate configuration was changed while determining its transistor characteristics to ensure that the measurements were not a function of different chirality or diameter CNTs. The bottom-gate exposed CNT FET utilized 900 nm SiO2 as the gate insulator. This CNT FET was then covered with TiO2 to form the bottom-gate covered channel CNT FET. Finally, the top-gate CNT FET was fabricated and the device utilized TiO 2 (K ∼ 80, equivalent oxide thickness=0.25 nm) as the gate insulator. Of the three configurations investigated, the top-gate device exhibited best subthreshold slope (67-70 mV/dec), highest transconductance (1.3 μS), and negligible hysteresis in terms of threshold voltage shift. © 2006 American Institute of Physics.