Assistance de l’enseignement de la conception architecturale par la modélisation de savoir-faire des référents

Dans une époque de changements des moyens de représentation et communication en architecture, cette recherche porte sur l’enseignement de la conception architecturale et plus spécifiquement sur l’apport que l’informatique pourrait avoir dans ce processus. En nous basant sur une méthodologie qualitative, exploratoire et participative, nous y procédons par enchainement de questions, celle de départ étant la suivante: Comment l’enseignement de la conception architecturale pourrait tirer avantage des moyens numériques? Notre objectif est de proposer des méthodes et des outils d’apprentissage aux étudiants en architecture pour enrichir leurs démarches de conception grâce à l’ordinateur. Après une revue de la littérature dans le domaine, et un approfondissement de l’étude sur le rôle des référents architecturaux et sur la conception intégrée, nous avons procédé à une observation exploratoire du travail des étudiants en atelier d’architecture. Ces premières étapes de la recherche ont permis de dégager des discordances entre les positions théoriques et la pratique en l’atelier, pour concrétiser ultérieurement la question de recherche. Dans le but de discerner des méthodes efficaces et innovatrices pour répondre aux discordances identifiées, nous avons engagé une étude de la littérature sur les théories cognitives par rapport aux connaissances, l’apprentissage et la conception. Certaines stratégies ont pu être définies, notamment la nécessité de représentation multimodale des référents architecturaux, l’importance de représenter le processus et non seulement le résultat, ainsi que l’avantage d’inciter les étudiants à travailler dans leur ‘zone proximale’ de développement. Suite à ces recherches, une méthode d’enseignement complémentaire a été définie. Elle propose aux étudiants des explorations de l’objet en conception basées sur la manipulation des savoir-faire architecturaux. Cette méthode a été opérationnalisée d’un point de vue pédagogique ainsi que didactique et mise à l’épreuve auprès des étudiants en atelier. Un prototype de librairie de référents architecturaux interactifs (LibReArchI) a été créé dans ce but. Elle a été conçue en tant qu’environnement de conception et espace de partage de savoir-faire entre étudiants et enseignants. Les principaux résultats de cette recherche démontrent le rôle positif de la méthode proposée pour le transfert des savoir-faire architecturaux lors de l’apprentissage en atelier. Son potentiel d’assister la conception intégrée et de stimuler l’émergence d’idées a été constaté. Au niveau théorique, un modèle d’un cycle du processus de design avec le numérique a été esquissé. En conclusion, des avenues de développements futurs de cette recherche sont proposées.

Collaborative design procedures for architects and engineers

This book argues for novel strategies to integrate engineering design procedures and structural analysis data into architectural design. Algorithmic procedures that recently migrated into the architectural practice are utilized to improve the interface of both disciplines. Architectural design is predominately conducted as a negotiation process of various factors but often lacks rigor and data structures to link it to quantitative procedures. Numerical structural design on the other hand could act as a role model for handling data and robust optimization but it often lacks the complexity of architectural design. The goal of this research is to bring together robust methods from structural design and complex dependency networks from architectural design processes. The book presents three case studies of tools and methods that are developed to exemplify, analyze and evaluate a collaborative work flow.

An efficient low power FFT implementation for multiband full-rate ultra-wideband (UWB) receivers

This paper discusses the design, implementation and synthesis of an FFT module that has been specifically optimized for use in the OFDM based Multiband UWB system, although the work is generally applicable to many other OFDM based receiver systems. Previous work has detailed the requirements for the receiver FFT module within the Multiband UWB ODFM based system and this paper draws on those requirements coupled with modern digital architecture principles and low power design criteria to converge on our optimized solution. The FFT design obtained in this paper is also applicable for implementation of the transmitter IFFT module therefore only needing one FFT module for half-duplex operation. The results from this paper enable the baseband designers of the 200Mbit/sec variant of Multiband UWB systems (and indeed other OFDM based receivers) using System-on-Chip (SoC), FPGA and ASIC technology to create cost effective and low power solutions biased toward the competitive consumer electronics market.

A low clock frequency FFT core implementation for multiband full-rate ultra-wideband (UWB) receivers

This paper discusses the design, implementation and synthesis of an FFT module that has been specifically optimized for use in the OFDM based Multiband UWB system, although the work is generally applicable to many other OFDM based receiver systems. Previous work has detailed the requirements for the receiver FFT module within the Multiband UWB ODFM based system and this paper draws on those requirements coupled with modern digital architecture principles and low power design criteria to converge on our optimized solution particularly aimed at a low-clock rate implementation. The FFT design obtained in this paper is also applicable for implementation of the transmitter IFFT module therefore only needing one FFT module in the device for half-duplex operation. The results from this paper enable the baseband designers of the 200Mbit/sec variant of Multiband UWB systems (and indeed other OFDM based receivers) using System-on-Chip (SoC), FPGA and ASIC technology to create cost effective and low power consumer electronics product solutions biased toward the very competitive market.

Implementación y configuración de un receptor de radio definido por software (SDR) para estudios de propagación

The constant development of digital systems in radio communications demands the adaptation of the current receiving equipment to the new technologies. In this context, a new Software Defined Radio based receiver is being implemented with the aim of carrying out different experiments to analyze the propagation of signals through the atmosphere from a satellite beacon. The receiver selected for this task is the PERSEUS SDR from the Italian company Microtelecom s.r.l. It is a software defined VLF-LF-MF-HF receiver based on an outstanding direct sampling digital architecture which features a 14 bit 80 MSamples/s analog-to-digital converter, a high-performance FPGA-based digital down-converter and a high-speed 480 Mbit/s USB2.0 PC interface. The main goal is to implement the related software and adapt the new receiver to the current working environment. In this paper, SDR technology guidelines are given and PERSEUS receiver digital signal processing is presented with the most remarkable results.

Web Classroom Application. Digital technologies to study theory, history and criticism of architecture at Escuela Superior de Arquitectura UPMadrid. The search for some guides to direct the inquiry learning

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A Semantic-Oriented Architecture of a Functional Module for Personalized and Adaptive Access to the Knowledge in a Multimedia Digital Library

This article presents the principal results of the doctoral thesis “Semantic-oriented Architecture and Models for Personalized and Adaptive Access to the Knowledge in Multimedia Digital Library” by Desislava Ivanova Paneva-Marinova (Institute of Mathematics and Informatics), successfully defended before the Specialised Academic Council for Informatics and Mathematical Modelling on 27 October, 2008.

Archaeology, Architecture and Digital Adaptation: Developing a GIS for Archaeological Excavation on Crete

This paper is not about the history or archaeology of Priniatikos Pyrgos per se. Rather, it is a review of how the site was recorded using both traditional survey and planning techniques and digital approaches applied through a Geographical Information System (hereafter GIS) during the 2007 through 2010 seasons. Earlier work at the site will necessarily be reviewed, specifically the geophysical survey work of the Istron Geoarchaeological Project and the excavations by Hayden and Tsipopoulou between 2005 and 2006, and regional survey work by Hayden and colleagues in the Vrokastro region (Hayden, this volume, 1999, 2004; Sarris et al. 2005; Shahrukh et al. 2012). The digitisation and incorporation of the latter into the project GIS will be explored in some detail.

Digital Media in Landscape Architecture Design Process

Thesis (Master's)--University of Washington, 2016-08

Digital 3D reconstruction as a research environment in art and architecture history: uncertainty classification and visualisation

The dissertation addresses the still not solved challenges concerned with the source-based digital 3D reconstruction, visualisation and documentation in the domain of archaeology, art and architecture history. The emerging BIM methodology and the exchange data format IFC are changing the way of collaboration, visualisation and documentation in the planning, construction and facility management process. The introduction and development of the Semantic Web (Web 3.0), spreading the idea of structured, formalised and linked data, offers semantically enriched human- and machine-readable data. In contrast to civil engineering and cultural heritage, academic object-oriented disciplines, like archaeology, art and architecture history, are acting as outside spectators. Since the 1990s, it has been argued that a 3D model is not likely to be considered a scientific reconstruction unless it is grounded on accurate documentation and visualisation. However, these standards are still missing and the validation of the outcomes is not fulfilled. Meanwhile, the digital research data remain ephemeral and continue to fill the growing digital cemeteries. This study focuses, therefore, on the evaluation of the source-based digital 3D reconstructions and, especially, on uncertainty assessment in the case of hypothetical reconstructions of destroyed or never built artefacts according to scientific principles, making the models shareable and reusable by a potentially wide audience. The work initially focuses on terminology and on the definition of a workflow especially related to the classification and visualisation of uncertainty. The workflow is then applied to specific cases of 3D models uploaded to the DFG repository of the AI Mainz. In this way, the available methods of documenting, visualising and communicating uncertainty are analysed. In the end, this process will lead to a validation or a correction of the workflow and the initial assumptions, but also (dealing with different hypotheses) to a better definition of the levels of uncertainty.

Solução doméstica para televisão digital

Mestrado em Engenharia Electrotécnica e de Computadores

Unified transform architecture for AVC, AVS, VC-1 and HEVC high-performance codecs

A unified architecture for fast and efficient computation of the set of two-dimensional (2-D) transforms adopted by the most recent state-of-the-art digital video standards is presented in this paper. Contrasting to other designs with similar functionality, the presented architecture is supported on a scalable, modular and completely configurable processing structure. This flexible structure not only allows to easily reconfigure the architecture to support different transform kernels, but it also permits its resizing to efficiently support transforms of different orders (e. g. order-4, order-8, order-16 and order-32). Consequently, not only is it highly suitable to realize high-performance multi-standard transform cores, but it also offers highly efficient implementations of specialized processing structures addressing only a reduced subset of transforms that are used by a specific video standard. The experimental results that were obtained by prototyping several configurations of this processing structure in a Xilinx Virtex-7 FPGA show the superior performance and hardware efficiency levels provided by the proposed unified architecture for the implementation of transform cores for the Advanced Video Coding (AVC), Audio Video coding Standard (AVS), VC-1 and High Efficiency Video Coding (HEVC) standards. In addition, such results also demonstrate the ability of this processing structure to realize multi-standard transform cores supporting all the standards mentioned above and that are capable of processing the 8k Ultra High Definition Television (UHDTV) video format (7,680 x 4,320 at 30 fps) in real time.

Sparse matrix multiplication on a reconfigurable many-core architecture

Sparse matrix-vector multiplication (SMVM) is a fundamental operation in many scientific and engineering applications. In many cases sparse matrices have thousands of rows and columns where most of the entries are zero, while non-zero data is spread over the matrix. This sparsity of data locality reduces the effectiveness of data cache in general-purpose processors quite reducing their performance efficiency when compared to what is achieved with dense matrix multiplication. In this paper, we propose a parallel processing solution for SMVM in a many-core architecture. The architecture is tested with known benchmarks using a ZYNQ-7020 FPGA. The architecture is scalable in the number of core elements and limited only by the available memory bandwidth. It achieves performance efficiencies up to almost 70% and better performances than previous FPGA designs.