Electrical Power Distribution System modeling with VHDL-AMS for the construction of a Real-Time Digital Simulator using FPGAS devices

This paper presents a distribution feeder simulation using VHDL-AMS, considering the standard IEEE 13 node test feeder admitted as an example. In an electronic spreadsheet all calculations are performed in order to develop the modeling in VHDL-AMS. The simulation results are compared in relation to the results from the well knowing MatLab/Simulink environment, in order to verify the feasibility of the VHDL-AMS modeling for a standard electrical distribution feeder, using the software SystemVision™. This paper aims to present the first major developments for a future Real-Time Digital Simulator applied to Electrical Power Distribution Systems. © 2012 IEEE.

Model for electrodes' filaments of hot cathode fluorescent lamps, during preheating with constant rms current

This paper presents a new model for the representation of electrodes' filaments of hot-cathode fluorescent lamps, during preheating processes based on the injection of currents with constant root mean square (rms) values. The main improvement obtained with this model is the prediction of the R-h/R-c ratio during the preheating process, as a function of the preheating time and of the rms current injected in the electrodes. Using the proposed model, it is possible to obtain an estimate of the time interval and the current that should be provided by the electronic ballast, in order to ensure a suitable preheating process. is estimate of time and current can be used as input data in the design of electronic ballasts with programmed lamp start, permitting the prediction of the R-h/R-c ratio during the initial steps of the design (theoretical analysis and digital simulation). Therefore, the use of the proposed model permits to reduce the necessity of several empirical adjustments in the prototype, in order to set the operation of electronic ballasts during the preheating process. This fact reduces time and costs associated to the global design procedure of electronic ballasts.

Gold nanoelectrode ensembles for direct trace electroanalysis of iodide

A procedure for the standardization of ensembles of gold nanodisk electrodes (NEE) of 30 nm diameter is presented, which is based on the analytical comparison between experimental cyclic voltammograms (CV) obtained at the NEEs in diluted solutions of redox probes and CV patterns obtained by digital simulation. Possible origins of defects sometimes found in NEEs are discussed. Selected NEEs are then employed for the study of the electrochemical oxidation of iodide in acidic solutions. CV patterns display typical quasi-reversible behavior which involves associated chemical reactions between adsorbed and solution species. The main CV characteristics at the NEE compare with those observed at millimeter sized gold disk electrodes (Au-macro), apart a slight shift in E1/2 values and slightly higher peak to peak separation at the NEE. The detection limit (DC) at NEEs is 0.3 mu M, which is more than one order of magnitude lower than DL at the Au-macro (4 RM). The mechanism of the electrochemical oxidation of iodide at NEEs is discussed. Finally, NEEs are applied to the direct determination of iodide at micromolar concentration levels in real samples, namely in some ophthalmic drugs and iodized table salt. (c) 2006 Elsevier B.V. All rights reserved.

Uma aplicacao da celula de comutacao ZVS-PWM-GEPAE ao conversor DC-AC

This work presents the design and procedure of a DC-to-AC converter using a ZVS Commutation Cell developed by Barbi and Martins (1991) and applied to the family of DC-to-DC PWM converters. Firstly, we show the cell applied to buck converter. The stages of operation and the main current and voltage equations of the resonant devices are presented. Next, we adapt the converter to the regenerative operation mode. Hence, the full bridge converter at low frequency operation is conected on the DC-to-DC stage (at high frequency) output ends (Seixas, 1993). Commutation of zero voltage for all switches, PWM at constant frequency and neither overvoltage nor additional current stress are observed by digital simulation. The design example and experimental results obtained by prototype rated at 275 V, 1 kW and 40 kHz are also presented.

The ZVS-PWM commutation cell applied to the DC-AC converter

This paper presents the analysis of a dc-ac converter using a zero-voltage-switching (ZVS) commutation cell. First, we show the cell applied to the buck converter. The stages of operation are presented along with the main current and voltage equations. Next, we adapt the converter to the regenerative-operation mode. Hence, the full-bridge converter at low-frequency operation is connected in the dc-dc output stage (at high frequency). The main switches commute at zero voltage. The converter operated at constant frequency with pulse-width modulation (PWM), and neither overvoltage nor additional current stress was observed by digital simulation. A design example and experimental results obtained by prototype, rated at 275 V and 1 kW, are also presented. © 1997 IEEE.

The use of tuned filters as an attenuator device of harmonics generated by multipulse converters

The purpose of this paper is to present a computer model that enables the operation analysis of a tuned filter as an attenuator device of harmonic generated 12 and 18-pulses converters with Y-generalized differential connection. Are presented in this study physical considerations, mathematical modeling and digital simulations in the frequency domain using the software Orcad-Pspice®, which allows a spectral analysis of the harmonic components and supports the search for an optimal filtering process. It is unequivocally demonstrated the feasibility of the application as an alternative to optimize the use of multipulse converters, and enable the operation of this device within the established regulatory standards. The validation of the proposed model is based on results obtained in the time domain using Matlab/Simulink®. © 2011 IEEE.

Conversor buck utilizando célula de comutação de três estados

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Generating VHDL-AMS models of digital-to-analogue converters from MATLAB (R)/SIMULINK (R)

Today, the trend within the electronics industry is for the use of rapid and advanced simulation methodologies in association with synthesis toolsets. This paper presents an approach developed to support mixed-signal circuit design and analysis. The methodology proposed shows a novel approach to the problem of developing behvioural model descriptions of mixed-signal circuit topologies, by construction of a set of subsystems, that supports the automated mapping of MATLAB (R)/SINIULINK (R) models to structural VHDL-AMS descriptions. The tool developed, named (MSSV)-S-2, reads a SIMULINK (R) model file and translates it to a structural VHDL-AMS code. It also creates the file structure required to simulate the translated model in the SystemVision (TM). To validate the methodology and the developed program, the DAC08, AD7524 and AD5450 data converters were studied and initially modelled in MATLAB (R)/SIMULINK (R). The VHDL-AMS code generated automatically by (MSSV)-S-2, (MATLAB (R)/SIMULINK (R) to SystemVision (TM)), was then simulated in the SystemVision (TM). The simulation results show that the proposed approach, which is based on VHDL-AMS descriptions of the original model library elements, allows for the behavioural level simulation of complex mixed-signal circuits.

An algorithmic of analog-to-digital converter using current-mode and digital CMOS process

In this paper a new algorithmic of Analog-to-Digital Converter is presented. This new topology use the current-mode technique that allows a large dynamic range and can be implemented in digital CMOS process. The ADC proposed is very small and can handle high sampling rates. Simulation results using a 1.2um CMOS process show that an 8-b ADC can support a sampling rate of 50MHz.

Patient comfort in periapical examination using digital receptors

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Generating VHDL-AMS models of digital-to-analogue converters from MATLAB®/SIMULINK®

Today, the trend within the electronics industry is for the use of rapid and advanced simulation methodologies in association with synthesis toolsets. This paper presents an approach developed to support mixed-signal circuit design and analysis. The methodology proposed shows a novel approach to the problem of developing behvioural model descriptions of mixed-signal circuit topologies, by construction of a set of subsystems, that supports the automated mapping of MATLAB®/SIMULINK® models to structural VHDL-AMS descriptions. The tool developed, named MS 2SV, reads a SIMULINK® model file and translates it to a structural VHDL-AMS code. It also creates the file structure required to simulate the translated model in the System Vision™. To validate the methodology and the developed program, the DAC08, AD7524 and AD5450 data converters were studied and initially modelled in MATLAB®/ SIMULINK®. The VHDL-AMS code generated automatically by MS 2SV, (MATLAB®/SIMULINK® to System Vision™), was then simulated in the System Vision™. The simulation results show that the proposed approach, which is based on VHDL-AMS descriptions of the original model library elements, allows for the behavioural level simulation of complex mixed-signal circuits.

How the delphi and AHP methods are aiding to define the critical success factors priorities in a digital factory project implementation

Digital factory is a concept that offers a collaborative approach to enhance product and production engineering processes through simulation. Products, processes and resources are modeled to be used to develop and test the product conception and manufacturing processes, before their use in the real factory. The purpose of this paper is to present the steps to identify the Critical Success Factors (CSF) priorities in a digital factory project implementation in a Brazilian company and how the Delphi and AHP Methods are aiding to identify these CSF priorities. Copyright © 2008 SAE International.

Digital filtering of oscillations intrinsic to transmission line modeling based on lumped parameters

A correction procedure based on digital signal processing theory is proposed to smooth the numeric oscillations in electromagnetic transient simulation results from transmission line modeling based on an equivalent representation by lumped parameters. The proposed improvement to this well-known line representation is carried out with an Finite Impulse Response (FIR) digital filter used to exclude the high-frequency components associated with the spurious numeric oscillations. To prove the efficacy of this correction method, a well-established frequency-dependent line representation using state equations is modeled with an FIR filter included in the model. The results obtained from the state-space model with and without the FIR filtering are compared with the results simulated by a line model based on distributed parameters and inverse transforms. Finally, the line model integrated with the FIR filtering is also tested and validated based on simulations that include nonlinear and time-variable elements. © 2012 Elsevier Ltd. All rights reserved.

Implementação de um controle digital para o compensador regenerativo de potência ativa

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Pré-regulador retificador boost com controle digital por valores médios, para sistema de iluminação fluorescente multi-lâmpadas, utilizando dispositivo FPGA e VHDL

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)