Virtual instrumentation applied to the implementation of IEEE STD 1459-2000 power definitions

This paper discusses the utilization of Virtual Instrumentation to the implementation and evaluation of different power definitions, so that classical formulations and new definitions can be compared without the necessity of acquiring different power meters or analyzers. Accordingly, the definitions of IEEE Standard 1459-2000 for the measurement of power quantities under distorted and unbalanced situations, have been digitally implemented. Thus, several power and power factor components related to the decomposition of the measured voltage and current signals have been obtained. The proposed PC-based Virtual Instrument uses a high performance acquisition board and isolated sensors and transducers. All digital algorithms and routines have been implemented by means of a graphical development system. Regarding to the implementation of STD 1459, this paper also proposes several different algorithms to the required decompositions of voltage, current and power components. © 2005 IEEE.

Conservative power theory discussion and evaluation by means of virtual instrumentation

Considering different single and multiphase circuits feeding linear and non-linear loads, this paper presents theoretical discussions and experimental evaluation of the recent Conservative Power Theory (CPT), by means of Virtual Instrumentation concepts. The main goal is to analyze the results of such power theory definitions under nonsinusoidal and unbalanced conditions, pointing out its major advantages, possible drawbacks or relevant aspects for discussion. © 2009 IEEE.

Using multiple abstraction levels to speedup an MPSoC virtual platform simulator

Virtual platforms are of paramount importance for design space exploration and their usage in early software development and verification is crucial. In particular, enabling accurate and fast simulation is specially useful, but such features are usually conflicting and tradeoffs have to be made. In this paper we describe how we integrated TLM communication mechanisms into a state-of-the-art, cycle-accurate, MPSoC simulation platform. More specifically, we show how we adapted ArchC fast functional instruction set simulators to the MPARM platform in order to achieve both fast simulation speed and accuracy. Our implementation led to a much faster hybrid platform, reaching speedups of up to 2.9 and 2.1x on average with negligible impact on power estimation accuracy (average 3.26% and 2.25% of standard deviation). © 2011 IEEE.

Planejamento de um ambiente virtual de aprendizagem baseado em interfaces dinâmicas e uma aplicação ao estudo de potência elétrica

Pós-graduação em Engenharia Elétrica - FEIS