34 resultados para Unbalanced circuit
em Repositório Institucional UNESP - Universidade Estadual Paulista "Julio de Mesquita Filho"
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This paper presents a practical experimentation for comparing reactive/non-active energy measures, considering three-phase four-wire non-sinusoidal and unbalanced circuits, involving five different commercial electronic meters. The experimentation set provides separately voltage and current generation, each one with any waveform involving up to fifty-first harmonic components, identically compared with acquisitions obtained from utility. The experimental accuracy is guaranteed by a class A power analyzer, according to IEC61000-4-30 standard. Some current and voltage combination profiles are presented and confronted with two different references of reactive/non-active calculation methodologies; instantaneous power theory and IEEE 1459-2010. The first methodology considers the instantaneous power theory, present into the advanced mathematical internal algorithm from WT3000 power analyzer, and the second methodology, accomplish with IEEE 1459-2010 standard, uses waveform voltage and current acquisition from WT3000 as input data for a virtual meter developed on Mathlab/Simulink software. © 2012 IEEE.
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This paper presents some methodologies for reactive energy measurement, considering three modern power theories that are suitable for three-phase four-wire non-sinusoidal and unbalanced circuits. The theories were applied in some profiles collected in electrical distribution systems which have real characteristics for voltages and currents measured by commercial reactive energy meters. The experimental results are presented in order to analyze the accuracy of the methodologies, considering the standard IEEE 1459-2010 as a reference. Finally, for additional comparisons, the theories will be confronted with the modern Yokogawa WT3000 energy meter and three samples of a commercial energy meter through an experimental setup. © 2011 IEEE.
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Three-Phase Induction Motors (TIM) and Arc Welding Machines (AWM) are loads of special behavior widely used in industrial and commercial installations, and therefore may contribute significantly to the deterioration of the quality of energy supplied by utilities. This paper proposes a modeling in constant power of the unbalanced TIM starting using Genetic Algorithm (GA) and AWM short-circuit based on their statics characteristics curves. The proposed models are compared with the conventional models in the literature. The results showed the good performance of the proposed models, allowing a more precise analysis of the real requests of these loads.
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Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)
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The use of the SenseWear (TM) armband (SWA), an objective monitor of physical activity, is a relatively new device used by researchers to measure energy expenditure. These monitors are practical, relatively inexpensive and easy-to-use. The aim of the present study was to assess the validity of SWAs for the measurement of energy expenditure (EE) in circuit resistance training (CRT) at three different intensities in moderately active, healthy subjects. The study subjects (17 females, 12 males) undertook CRT at 30, 50 and 70% of the 15 repetition maximum for each exercise component wearing an SWA as well as an Oxycon Mobile (OM) portable metabolic system (a gold standard method for measuring EE). The EE rose as exercise intensity increased, but was underestimated by the SWAs. For women, Bland-Altman plots showed a bias of 1.13 +/- A 1.48 METs and 32.1 +/- A 34.0 kcal in favour of the OM system, while for men values of 2.33 +/- A 1.82 METs and 75.8 +/- A 50.8 kcal were recorded.
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Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)
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In this paper is presented an implementation of winner-take-all circuit using CMOS technology. In the proposed configuration the inputs are current and the outputs voltage. The simulation results show that the circuit can be a winner if its input is larger than the other by 2 mu A. The simulation also shows that the response time is 100ns at a 0.2pF load capacitance. To demonstrate the functionality of the proposed circuit, a two-input winner take all circuit was built and tested by using discrete CMOS transistor array (CD40071).
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This study analyzes an accident in which two maintenance workers suffered severe burns while replacing a circuit breaker panel in a steel mill, following model of analysis and prevention of accidents (MAPA) developed with the objective of enlarging the perimeter of interventions and contributing to deconstruction of blame attribution practices. The study was based on materials produced by a health service team in an in-depth analysis of the accident. The analysis shows that decisions related to system modernization were taken without considering their implications in maintenance scheduling and creating conflicts of priorities and of interests between production and safety; and also reveals that the lack of a systemic perspective in safety management was its principal failure. To explain the accident as merely non-fulfillment of idealized formal safety rules feeds practices of blame attribution supported by alibi norms and inhibits possible prevention. In contrast, accident analyses undertaken in worker health surveillance services show potential to reveal origins of these events incubated in the history of the system ignored in practices guided by the traditional paradigm.
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A simple and inexpensive way to fabricate arrays of gold microelectrodes is proposed. Integrated circuit chips are sawed through their middle, normal to the longest axis, leading to destruction of the silicon circuit and rupture of the gold wires that interconnect it with the external terminals. Polishing the resulting rough surface converts the tips of the wires embedded in the chip halves into arrays of gold microdisks of about 25 mu m diameter. The number of active microelectrodes (MEs), of an array depends on the number of pins in the chip, n, being typically (n/2)-4. These MEs can be used individually or externally interconnected in any combination. X-ray images of the chips and micrographs of the resulting surface of the polished arrays have revealed variable distances between neighbor MEs, which are, however, larger than 10 times the radius of the disks. This feature of the MEs prevents diffusional cross-talk between electrodes. The use of these microdisk electrodes for analytical purposes exhibits sigmoidal voltammograms, and chronoamperometric experiments confirm the nonlinear i vs. t(1/2) plots, typical for processes where radial diffusion prevails. Satisfactory uniformity was observed for the response of each electrode of an array, indicating similarity of geometry and disk areas. The potentialities of these MEs were demonstrated by the determination of cadmium at ppb levels using square wave voltammetry with preconcentration. Due to the relative ease with which these MEs can be manufactured and their good performance in (chemical) analysis, wide applications in electrochemistry and electroanalysis is envisioned.
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The neutral wire in most existing power flow and fault analysis software is usually merged into phase wires using Kron's reduction method. In some applications, such as fault analysis, fault location, power quality studies, safety analysis, loss analysis etc., knowledge of the neutral wire and ground currents and voltages could be of particular interest. A general short-circuit analysis algorithm for three-phase four-wire distribution networks, based on the hybrid compensation method, is presented. In this novel use of the technique, the neutral wire and assumed ground conductor are explicitly represented. A generalised fault analysis method is applied to the distribution network for conditions with and without embedded generation. Results obtained from several case studies on medium- and low-voltage test networks with unbalanced loads, for isolated and multi-grounded neutral scenarios, are presented and discussed. Simulation results show the effects of neutrals and system grounding on the operation of the distribution feeders.
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Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)
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The construction of a flow-through cell incorporating an array of gold microelectrodes is described and its application to flow injection analysis with amperometric detection is presented, Simple modification of almost any conventional integrated circuit chip, used as an inexpensive source of pre-assembled gold micro-wires, leads to the rapid and successful preparation of arrays of 8-48 elements, the polymeric encapsulation material from the top face of the chip is removed by abrasion until the gold micro-mires (used to interconnect the silicon circuit to the external contact pins of the chip) are disrupted and their transversal (elliptical) sections become exposed. Once polished, the flat and smooth top surface of the gold microelectrode-array chip (MEAC) is provided with a spacer and fitted under pressure against an acrylic block with the reference and auxiliary electrodes, to form the electrochemical (thin-layer) flow cell, while the contact pins are plugged into a standard IC socket, This design ensures autonomous electric contact with each electrode and allows fast dismantling for polishing or substitution, the performance of flow cells with MEACs was investigated utilizing the technique of reverse pulse amperometry without oxygen removal, A method was established for the determination of the copper concentration in sugar cane spirit, regulated by law for beverages, Samples from industrial producers and small-scale (alembic) brewers were compared, With a 24 MEAC, a detection limit of 30 mu g I-l of copper (4.7 x 10(-7) mol l(-1) of Cu-II for 100 mu l injections) was calculated, Routine operation was established at a frequency of 60-90 determinations per hour, Intercomparison with atomic absorption spectrometric determinations resulted in excellent agreement.
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This paper presents a configurable architecture which was designed to aid in the simulation of ULSI circuits at the transistor level. Elsewhere [1] this architecture was shown to be able to run such simulations several times as fast as standard circuit simulators such as SPICES. In this paper, after describing the overall idea and the the architecture of the system as a whole, I concentrate on the description of the architecture of the processing elements of the computing array.
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Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)