22 resultados para Java utility

em Repositório Institucional UNESP - Universidade Estadual Paulista "Julio de Mesquita Filho"


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É de interesse prático, quando se dispõe de diferentes lotes de sementes, conhecer a qualidade fisiológica intrínseca a cada um. Objetivou-se determinar a qualidade fisiológica de lotes de sementes da leguminosa forrageira tropical, Macrotyloma axillare cv. Java, com utilização de diferentes metodologias para realização dos testes germinação e vigor. Determinou-se a pureza física dos lotes, o peso de mil sementes, a germinação com e sem escarificação (TG) e o vigor (índice de velocidade de germinação (IVG), primeira contagem, envelhecimento acelerado e condutividade elétrica) de três lotes de sementes. Diferenças na qualidade fisiológica inicial de sementes escarificadas foram observadas pelo teste de germinação. Pelos resultados dos testes de primeira contagem e IVG não foi possível detectar diferenças na qualidade fisiológica das sementes; o envelhecimento acelerado das sementes escarificadas pode ser realizado a 41º C por 72 horas ou a 45º C por 48 horas; o teste de condutividade elétrica mostrou-se adequado para diferenciar os lotes, a partir de 48 horas de embebição.

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Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

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Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

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Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

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This paper presents an improved analysis of a novel Programmable Power-factor-corrected-Based Hybrid Multipulse Power Rectifier (PFC-HMPR) for utility interface of power electronic converters. The proposed hybrid multipulse rectifier is composed of an ordinary three-phase six-pulse diode-bridge rectifier (Graetz bridge) with a parallel connection of single-phase switched converters in each three-phase rectifier leg. In this paper, the authors present a complete discussion about the controlled rectifiers' power contribution and also a complete analysis concerning the total harmonic distortion of current that can be achieved when the proposed converter operates as a conventional 12-pulse rectifier. The mathematical analysis presented in this paper corroborate, with detailed equations, the experimental results of two 6-kW prototypes implemented in a laboratory.

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This paper introduces Java applet programs for a WWW (world wide web)-HTML (hypertext markup language)-based multimedia course in Power Electronics. The applet programs were developed with the purpose of providing an interactive visual simulation and analysis of idealized uncontrolled single-phase, and three-phase rectifiers. In addition, this paper discusses the development and utilization of JAVA applet programs to solve some design-oriented equations for rectifier applications. The major goal of these proposed JAVA applets was to provide more facilities for the students increase their pace in Power Electronics course, emphasizing waveforms analysis, and providing conditions for an on-line comparative analysis among different hands-on laboratory experiences, via a normal Internet TCP/IP connection. Therefore, using the proposed JAVA applets, which were embedded in a WWW-HTML-based course in Power Electronics, was observed an important improvement of the apprenticeship for the content of this course. Therefore, the course structure becomes fluid, allowing a true on-line course over the WWW, motivating students to learn its content, and apply it in some applications-oriented projects, and their home-works.

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This paper presents Java applet programs for a WWW (world wide web)-HTML (hypertext markup language)-based multimedia course in basic power electronics circuits. These tools make use of the benefits of Java language to provide a dynamic and interactive approach to simulate steady-state idealized rectifiers (uncontrolled and controlled; single-phase and three-phase). In addition, this paper discusses the development and the use of the Java applet programs to assist the teaching of basics rectifier power electronics circuits, and to serve as a first design tool for basics power electronics circuits in the experiments of the laboratories. In order to validate the developed simulation applets, the results were confronted with results obtained from a well-know simulator package PSPICE. © 2005 IEEE.

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In this paper it is proposed a novel hybrid three-phase rectifier capable to achieve high input power factor (PF), and low total harmonic distortion in the input currents (THDI). The proposed hybrid high power rectifier is composed by a standard three-phase 6-pulses diode rectifier (Graetz bridge) with a parallel connection of single-phase Boost rectifiers in each three-phase rectifier leg. Such topology results in a structure capable of programming the input current waveform and providing conditions for obtaining high input power factor and low harmonic current distortion. In order to validate the proposed hybrid rectifier, this paper describes its principles of operation, with detailed experimental results and discussions on power rating of the required Boost converters as related to the desired total harmonic current distortion. It is demonstrated that only a fraction of the output power is processed through the Boost converters, making the proposed solution economically viable for very high power installations, with fast pay back of the investment. Moreover, retrofitting to existing installations is also feasible since the parallel path can be easily controlled by integration with the existing de-link. A prototype rated at 6 kW has been implemented in laboratory and fully demonstrated its operation, performance and feasibility to high power applications. © 2005 IEEE.

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With the considerable increase of the losses in electric utilities of developing countries, such as Brazil, there is an investigation for loss calculation methodologies, considering both technical (inherent of the system) and non-technical (usually associated to the electricity theft) losses. In general, all distribution networks know the load factor, obtained by measuring parameters directly from the network. However, the loss factor, important for the energy loss cost calculation, can only be obtained in a laborious way. Consequently, several formulas have been developed for obtaining the loss factor. Generally, it is used the expression that relates both factors, through the use of a coefficient k. Last reviews introduce a range of factor k within 0.04 - 0.30. In this work, an analysis with real life load curves is presented, determining new values for the coefficient k in a Brazilian electric utility. © 2006 IEEE.

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The Coleoptera order is the richest group among Metazoa, but its phylogenetics remains incompletely understood. Among Coleoptera, bioluminescence is found within the Elateroidea, but the evolution of this character remains a mystery. Mitochondrial DNA has been used extensively to reconstruct phylogenetic relationships, however, the evolution of a single gene does not always correspond to the species evolutionary history and the molecular marker choice is a key step in this type of analysis. To create a solid basis to better understand the evolutionary history of Coleoptera and its bioluminescence, we sequenced and comparatively analyzed the mitochondrial genome of the Brazilian luminescent click beetle Pyrophorus divergens (Coleoptera: Elateridae). © 2007 Elsevier B.V. All rights reserved.

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Reconfigurable computing is one of the most recent research topics in computer science. The Altera - Nios II soft-core processor can be included in a large set of reconfigurable architectures, especially because it is designed in software, allowing it to be configured according to the application. The recent growth in applications that demand reconfigurable computing made necessary the building of compilers that translate high level languages source codes into reconfigurable devices instruction sets. In this paper we present a compiler that takes as input the bytecodes generated by a Java front-end compiler and generates a set of instructions that attends to the Nios II processor instruction set rules. Our work shows how we process Java bytecodes to the intermediate code, in the Nios II instructions format, and build the control flow and the control dependence graphs. © 2009 IEEE.

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Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

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Pós-graduação em Engenharia Elétrica - FEIS