259 resultados para Load voltage maximization
Resumo:
A CMOS low-voltage, wide-band continuous-time current amplifier is presented. Based on an open-loop topology, the circuit is composed by transresistance and transconductance stages built around triode-operating transistors. In addition to an extended dynamic range, the amplifier gain can be programmed within good accuracy by the rapport between the aspect-ratio of such transistors and tuning biases Vxand Vy. A balanced current-amplifier according to a single I. IV-supply and a 0.35μm fabrication process is designed. Simulated results from PSPiCE and Bsm3v3 models indicate a programmable gain within the range 20-34dB and a minimum break-frequency of IMHz @CL=IpF. For a 200 μApp-level, THD is 0.8% and 0.9% at IKHz and 100KHz, respectively. Input noise is 405pA√Hz @20dB-gain, which gives a SNR of 66dB @1MHz-bandwidth. Maximum quiescent power consumption is 56μ W. © 2002 IEEE.
Resumo:
The study of the stable and the metastable ferroelectric polarization of poly(vinylidene fluoride), PVDF, was performed using two successive equal sign ramp voltages, mediated by a short-circuit period. Rates from 10 V/s up to 0.7 MV/s were used. Results showed that they follow different formation kinetics; that the stable part decreases for higher ramp voltage rates and its apparent coercive field increases.
Resumo:
This paper introduces a method for the supervision and control of devices in electric substations using fuzzy logic and artificial neural networks. An automatic knowledge acquisition process is included which allows the on-line processing of operator actions and the extraction of control rules to replace gradually the human operator. Some experimental results obtained by the application of the implemented software in a simulated environment with random signal generators are presented.
Resumo:
An active leakage-injection scheme (ALIS) for low-voltage (LV) high-density (HD) SRAMs is presented. By means of a feedback loop comprising a servo-amplifier and a common-drain MOSFET, a current matching the respective bit-line leakage is injected onto the line during precharge and sensing, preventing the respective capacitances from erroneous discharges. The technique is able to handle leakages up to hundreds of μA at high operating temperatures. Since no additional timing is required, read-out operations are performed at no speed penalty. A simplified 256×1bit array was designed in accordance with a 0.35 CMOS process and 1.2V-supply. A range of PSPICE simulation attests the efficacy of ALIS. With an extra power consumption of 242 μW, a 200 μA-leakage @125°C, corresponding to 13.6 times the cell current, is compensated.
Resumo:
This work presents a procedure for electric load forecasting based on adaptive multilayer feedforward neural networks trained by the Backpropagation algorithm. The neural network architecture is formulated by two parameters, the scaling and translation of the postsynaptic functions at each node, and the use of the gradient-descendent method for the adjustment in an iterative way. Besides, the neural network also uses an adaptive process based on fuzzy logic to adjust the network training rate. This methodology provides an efficient modification of the neural network that results in faster convergence and more precise results, in comparison to the conventional formulation Backpropagation algorithm. The adapting of the training rate is effectuated using the information of the global error and global error variation. After finishing the training, the neural network is capable to forecast the electric load of 24 hours ahead. To illustrate the proposed methodology it is used data from a Brazilian Electric Company. © 2003 IEEE.
Resumo:
A quasi-sinusoidal linearly tunable OTA-C VCO built with triode-region transconductors is presented. Oscillation upon power-on is ensured by RHP poles associated with gate-drain capacitances of OTA input devices. Since the OTA nonlinearity stabilizes the amplitude, the oscillation frequency f0 is first-order independent of VDD, making the VCO adequate to mixed-mode designs. A range of simulations attests the theoretical analysis. As part of a DPLL, the VCO was prototyped on a 0.8μm CMOS process, occupying an area of 0.15mm2. Nominal f0 is 1MHz, with K VCo=8.4KHz/mV. Measured sensitivity to VDD is below 2.17, while phase noise is -86dBc at 100-KHz offset. The feasibility of the VCO for higher frequencies is verified by a redesign based on a 0.35μm CMOS process and VDD=3.3V, with a linear frequency-span of l3.2MHz - 61.5MHz.
Resumo:
A low-voltage low-power 2nd-order CMOS pseudo-differential bump-equalizer is presented. Its topology comprises a bandpass section with adjustable center frequency and quality factor, together with a programmable current amplifier. The basic building blocks are triode-operating transconductors, tunable by means of either a DC voltage or a digitally controlled current divider. The bump-equalizer as part of a battery-operated hearing aid device is designed for a 1.4V-supply and a 0.35μm CMOS fabrication process. The circuit performance is supported by a set of simulation results, which indicates a center frequency from 600Hz to 2.4kHz, 1≤Q≤5, and an adjustable gain within ±6dB at center frequency. The filter dynamic range lies around 40dB. Quiescent consumption is kept below 12μW for any configuration of the filter.
Resumo:
This paper presents an investigation concerning the use of fundamental approximation analysis and a new lamp model for the prediction of the voltage over electrodes' filaments during dimming operation. The lamp model employed in this paper is based on equivalent resistances, which represent the electrodes' filaments and the gas column of a F32T8 lamp. Experimental results are presented in this paper, indicating the validity of the proposed analysis and confirming its potential to serve as an effective tool for the design of dimming electronic ballasts. © 2005 IEEE.
Resumo:
This paper presents the analysis, design, simulation, and experimental results for a high frequency high Power-Factor (PF) AC (Alternate Current) voltage regulator, using a Sepic converter as power stage. The control technique employed to impose a sinusoidal input current waveform, with low Total Harmonic Distortion (THD), is the sinusoidal variable hysteresis control. The control technique was implemented in a FPGA (Field Programmable Gate Array) device, using a Hardware Description Language (VHDL). Through the use of the proposed control technique, the AC voltage regulator performs active power-factor correction, and low THD in the input current, for linear and non-linear loads, satisfying the requirements of the EEC61000-3-2 standards. Experimental results from an example prototype, designed for 300W of nominal output power, 50kHz (switching frequency), and 127Vrms of nominal input and output voltages, are presented in order to validate the proposed AC regulator. © 2005 IEEE.
Resumo:
A 1000-kgf resistive strain-gauge load cell has been developed for quality testing of rocket propellant grain. A 7075-T6 aluminum alloy has been used for the elastic column, in which 8 uniaxial, 120-Ω strain gauges have been bonded and connected to form a full Wheatstone bridge to detect the strain. The chosen geometry makes the transducer insensitive to moments and, also, to the temperature. Experimental tests using a universal testing machine to imposed compression force to the load cell have demonstrated that its behavior is linear, with sensitivity of 2.90 μV/kgf ± 0.34%, and negligible hysteresis. The designed force transducer response to a dynamic test has been comparable to that of a commercial load cell. © 2005 IEEE.
Resumo:
With the considerable increase of the losses in electric utilities of developing countries, such as Brazil, there is an investigation for loss calculation methodologies, considering both technical (inherent of the system) and non-technical (usually associated to the electricity theft) losses. In general, all distribution networks know the load factor, obtained by measuring parameters directly from the network. However, the loss factor, important for the energy loss cost calculation, can only be obtained in a laborious way. Consequently, several formulas have been developed for obtaining the loss factor. Generally, it is used the expression that relates both factors, through the use of a coefficient k. Last reviews introduce a range of factor k within 0.04 - 0.30. In this work, an analysis with real life load curves is presented, determining new values for the coefficient k in a Brazilian electric utility. © 2006 IEEE.
Resumo:
Incentives for using wind power and the increasing price of energy might generate in a relatively short time a scenario where low voltage customers opt to install roof-top wind turbines. This paper focuses on evaluating the effects of such situation in terms of energy consumption, loss reduction, reverse power flow and voltage profiles. Various commercially-available roof-top wind turbines are installed in two secondary distribution circuits considering real-life wind speed data and seasonal load demand. Results are presented and discussed. © 2006 IEEE.
Resumo:
This paper proposes a dedicated algorithm for lation of single line-to-ground faults in distribution systems. The proposed algorithm uses voltage and current phasors measured at the substation level, voltage magnitudes measured at some buses of the feeder, a database containing electrical, operational and topological parameters of the distribution networks, and fault simulation. Voltage measurements can be obtained using power quality devices already installed on the feeders or using voltage measurement devices dedicated for fault location. Using the proposed algorithm, likely faulted points that are located on feeder laterals geographically far from the actual faulted point are excluded from the results. Assessment of the algorithm efficiency was carried out using a 238 buses real-life distribution feeder. The results show that the proposed algorithm is robust for performing fast and efficient fault location for sustained single line-to-ground faults requiring less than 5% of the feeder buses to be covered by voltage measurement devices. © 2006 IEEE.
Resumo:
An analog circuit that implements a radial basis function network is presented. The proposed circuit allows the adjustment of all shape parameters of the radial functions, i.e., amplitude, center and width. The implemented network was applied to the linearization of a nonlinear circuit, a voltage controlled oscillator (VCO). This application can be classified as an open-loop control in which the network plays the role of the controller. Experimental results have proved the linearization capability of the proposed circuit. Its performance can be improved by using a network with more basis functions. Copyright 2007 ACM.
Resumo:
This paper investigates the major similarities and discrepancies of three important current decompositions proposed for the interpretation of unbalanced and/or non linear three-phase four-wire circuits. The considered approaches were the so-called FBD Theory, the pq-Theory and the CPT. Although the methods are based on different concepts, the results obtained under ideal conditions (sinusoidal and balanced signals) are very similar. The main differences appear in the presence of unbalanced and non linear load conditions. It will be demonstrated and discussed how the choice of the voltage referential and the return conductor impedance can influence in the resulting current components, as well as, the way of interpreting a power circuit with return conductor. Under linear unbalanced conditions, both FBD and pq-Theory suggest that the some current components contain a third-order harmonic. Besides, neither pq-Theory nor FBD method are able to provide accurate information for reactive current under unbalanced and distorted conditions, what seems to be done by means of the CPT. © 2009 IEEE.