Modelling of the influence of the layer pollution thickness in high voltage polluted insulators

An experimental model and a mathematical model with the introduction of a ramp in the channel of Obenaus model are presented. The aim is to present a better reproduction of the real layer pollution deposited on the HV insulators. This better reproduction is obtained from two types of thickness variation: the introduction of a ramp (soft variation) and the introduction of a step (sudden variation). The computational simulations and the experimental data suggest that the introduction of the ramp is the better reproduction of the layer pollution. The ramp approximates to the real layer pollution more than the step.

Synchronous machines parameters identification using load rejection test data

This work shows a computational methodology for the determination of synchronous machines parameters using load rejection test data. The quadrature axis parameters are obtained with a rejection under an arbitrary reference, reducing the present difficulties.

New 12kW three-phase 18-pulse high power factor AC-DC converter with regulated output voltage for rectifier units

This work presents a new high power factor three-phase rectifier based on a Y-connected differential autotransformer with reduced kVA and 18-pulse input current followed by three DC-DC boost converters. The topology provides a regulated output voltage and natural three-phase input power factor correction. The lowest input current harmonic components are the 17th and the 19th. Three boost converters, with constant input currents and regulated parallel connected output voltages are used to process 4kW each one. Analytical results from Fourier analyses of winding currents and the vector diagram of winding voltages are presented. Simulation results to verify the proposed concept and experimental results are shown in the paper.

On designing linearly-tunable ultra-low voltage CMOS gm-C filters

A linearly-tunable ULV transconductor featuring excellent stability of the processed signal common-mode voltage upon tuning, critical for very-low voltage applications, is presented. Its employment to the synthesis of CMOS gm-C high-frequency and voiceband filters is discussed. SPICE data describe the filter characteristics. For a 1.3 V-supply, their nominal passband frequencies are 1.0 MHz and 3.78 KHz, respectively, with tuning rates of 12.52 KHz/mV and 0.16 KHz/m V, input-referred noise spectral density of 1.3 μV/Hz1/2 and 5.0μV/Hz1/2 and standby consumption of 0.87 mW and 11.8 μW. Large-signal distortion given by THD = 1% corresponds to a differential output-swing of 360 mVpp and 480 mVpp, respectively. Common-mode voltage deviation is less than 4 mV over tuning interval.

Reconfiguracao de sistemas de distribuicao radiais utilizando o criterio de queda de tensao

Network reconfiguration in distribution systems can be carried out by changing the status of sectionalizing switches and it is usually done for loss minimization and load balancing. In this paper it is presented an heuristic algorithm that accomplishes network reconfiguration for operation planning in order to obtain a configuration set whose configurations have the smallest active losses on its feeders. To obtain the configurations, it is used an approached radial load flow method and an heuristic proceeding based on maximum limit of voltage drop on feeders. Results are presented for three hypothetical systems largely known whose data are available in literature and a real system with 135 busses. In addition, it is used a fast and robust load flow which decreases the computational effort.

A fast electric load forecasting using neural networks

The objective of this work is the development of a methodology for electric load forecasting based on a neural network. Here, it is used Backpropagation algorithm with an adaptive process based on fuzzy logic. This methodology results in fast training, when compared to the conventional formulation of Backpropagation algorithm. Results are presented using data from a Brazilian Electric Company and the performance is very good for the proposal objective.

Novel high-power-factor isolated electronic ballast for multiple tubular fluorescent lamps

This paper presents a novel isolated electronic ballast for multiple fluorescent lamps, featuring high power-factor, and high efficiency. Two stages compose this new electronic ballast, namely, a new voltage step-down isolated Sepic rectifier, and a classical resonant Half-Bridge inverter. The new isolated Sepic rectifier is obtained from a Zero-Current-Switching (ZCS) Pulse-Width-Modulated (PWM) soft-commutation cell. The average-current control technique is used in this preregulator stage in order to provide low phase displacement and low Total-Harmonic-Distortion (THD) at input current, resulting in high power-factor, and attending properly IEC 61000-3-2 standards. The resonant Half-Bridge inverter performs Zero-Voltage-Switching (ZVS), providing conditions for the obtaining of overall high efficiency. It is developed a design example for the new isolated electronic ballast rated at 200W output power, 220Vrms input voltage, 115Vdc dc link voltage, with rectifier and inverter stages operating at 50kHz. Finally, experimental results are presented in order to verify the developed analysis. The THD at input current is equal to 5.25%, for an input voltage THD equal to 1.63%, and the measured overall efficiency is about 88.25%, at rated load.

An accurate low-voltage analog memory-cell with built-in multiplication

A CMOS memory-cell for dynamic storage of analog data and suitable for LVLP applications is proposed. Information is memorized as the gate-voltage of input-transistor of a gain-boosting triode-transconductor. The enhanced output-resistance improves accuracy on reading out the sampled currents. Additionally, a four-quadrant multiplication between the input to regulation-amplifier of the transconductor and the stored voltage is provided. Designing complies with a low-voltage 1.2μm N-well CMOS fabrication process. For a 1.3V-supply, CCELL=3.6pF and sampling interval is 0.25μA≤ ISAMPLE ≤ 0.75μA. The specified retention time is 1.28ms and corresponds to a charge-variation of 1% due to junction leakage @75°C. A range of MR simulations confirm circuit performance. Absolute read-out error is below O.40% while the four-quadrant multiplier nonlinearity, at full-scale is 8.2%. Maximum stand-by consumption is 3.6μW/cell.

A low-voltage triode-MOSFET four-quadrant multiplier with optimized current-efficiency

A low-voltage, low-power four-quadrant analog multiplier with optimized current-efficiency is presented. Its core corresponds to a pseudodifferential cascode, gain-boosting triode-transconductor. According to a low-voltage 1.2μm CMOS n-well process, operand differential-amplitudes are 1.0Vpp and 0.32Vpp for a 1.3V-supply. Common-mode voltages are properly chosen to maximize current-efficiency to 58%. Total quiescent dissipation is 260μW. A range of PSPICE simulation supports theoretical analysis. Excellent linearity is observed on dc characteristic. Assuming a ±0.5% mismatch on (W/L) and VTH THD at full-scale is 0.93% and 1.42%, for output frequencies of 1MHz and 10MHz, respectively.

Effect of powder milling and dopant addition on the current-voltage characteristics of SnO2-based ceramics

Non-linear electrical properties of SnO2-based ceramics were investigated as a function of powder agglomeration condition and as a function of dopant addition. All doped powders presented a single phase, cassiterite, as evidenced by X-ray diffraction analysis. The effect of milling was quite evident, with non-milled powder showing higher agglomerated particle size than milled powder. Cr addition seemed to increase the non-linear coefficient. Cu and Mn rendered dense ceramics, but α values for systems with Mn were higher than for systems with Cu.

A new solution to the optimal power flow problem

A new approach to solving the Optimal Power Flow problem is described, making use of some recent findings, especially in the area of primal-dual methods for complex programming. In this approach, equality constraints are handled by Newton's method inequality constraints for voltage and transformer taps by the logarithmic barrier method and the other inequality constraints by the augmented Lagrangian method. Numerical test results are presented, showing the effective performance of this algorithm. © 2001 IEEE.

A high efficiency HPF-ZCS-PWM Sepic for electronic ballast with multiple tubular fluorescent lamps

This paper presents a high efficiency Sepic rectifier for an electronic ballast application with multiple fluorescent lamps. The proposed Sepic rectifier is based on a Zero-Current-Switching (ZCS) Pulse-Width-Modulated (PWM) soft-commutation cell. The high power-factor of this structure is obtained using the instantaneous average-current control technique, in order to attend properly IEC61000-3-2 standards. The inverting stage of this new electronic ballast is a classical Zero-Voltage-Switching (ZVS) Half-Bridge inverter. A proper design methodology is developed for this new electronic ballast, and a design example is presented for an application with five fluorescent lamps 40W-T12 (200W output power), 220Vrms input voltage, 130Vdc dc link voltage, with rectifier and inverter stages operating at 50kHz. Experimental results are also presented. The THD at input current is equal to 6.41%, for an input voltage THD equal to 2.14%, and the measured overall efficiency is about 92.8%, at rated load.

Electrode poling of cellular polypropylene films with short high-voltage pulses

Recently, piezoelectric cellular polypropylene (PP) was proposed as a new type of quasi-ferroelectric. The observed hysteresis of the charge density as a function of the electric field could be explained as field-dependent charging inside the gas-filled voids. Interestingly enough, the measurable poling behavior of the macroscopic dipoles formed by charges that are trapped at the internal void surfaces is phenomenologically completely identical to the cooperative poling behavior of microscopic molecular dipoles in ferroelectric polymers. Therefore, it can be assumed that charge separation (or charge redistribution) and subsequent trapping in cellular PP is a rather fast switching process. In order to examine the poling dynamics, we developed an experimental setup for pulsed poling. High-voltage pulses with a duration of 45 μs (FWHM) were applied in direct contact to two-side metallized cellular PP films. The pulsed poling yields piezoelectricity in the cellular PP. We study and discuss the dependence of the resulting piezoelectricity on the poling field. We also characterize the charge separation during application of higher electric poling fields of up to -10 kV in direct contact to the two-side metallized films for longer times.

A linearly-tunable OTA-C sinusoidal oscillator for low-voltage applications

A low-voltage, low-power OTA-C sinusoidal oscillator based on a triode-MOSFET transconductor is here discussed. The classical quadrature model is employed and the transconductor inherent nonlinear characteristic with input voltage is used as the amplitude-stabilization element. An external bias VTUNE linearly adjusts the oscillation frequency. According to a standard 0.8μm CMOS n-well process, a prototype was integrated, with an effective area of 0.28mm2. Experimental data validate the theoretical analysis. For a single 1.8V-supply and 100mV≤VTUNE≤250mV, the oscillation frequency fo ranges from 0.50MHz to 1.125MHz, with a nearly constant gain KVCO=4.16KHz/mV. Maximum output amplitude is 374mVpp @1.12MHz. THD is -41dB @321mVpp. Maximum average consumption is 355μW.

Identification of synchronous machine parameters using load rejection test data

This work shows a computational methodology for the determination of synchronous machines parameters using load rejection test data. By machine modeling one can obtain the quadrature parameters through a load rejection under an arbitrary reference, reducing the present difficulties. The proposed method is applied to a real machine.