80 resultados para shaft voltage


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A low-voltage, low-power OTA-C sinusoidal oscillator based on a triode-MOSFET transconductor is here discussed. The classical quadrature model is employed and the transconductor inherent nonlinear characteristic with input voltage is used as the amplitude-stabilization element. An external bias VTUNE linearly adjusts the oscillation frequency. According to a standard 0.8μm CMOS n-well process, a prototype was integrated, with an effective area of 0.28mm2. Experimental data validate the theoretical analysis. For a single 1.8V-supply and 100mV≤VTUNE≤250mV, the oscillation frequency fo ranges from 0.50MHz to 1.125MHz, with a nearly constant gain KVCO=4.16KHz/mV. Maximum output amplitude is 374mVpp @1.12MHz. THD is -41dB @321mVpp. Maximum average consumption is 355μW.

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A CMOS low-voltage, wide-band continuous-time current amplifier is presented. Based on an open-loop topology, the circuit is composed by transresistance and transconductance stages built around triode-operating transistors. In addition to an extended dynamic range, the amplifier gain can be programmed within good accuracy by the rapport between the aspect-ratio of such transistors and tuning biases Vxand Vy. A balanced current-amplifier according to a single I. IV-supply and a 0.35μm fabrication process is designed. Simulated results from PSPiCE and Bsm3v3 models indicate a programmable gain within the range 20-34dB and a minimum break-frequency of IMHz @CL=IpF. For a 200 μApp-level, THD is 0.8% and 0.9% at IKHz and 100KHz, respectively. Input noise is 405pA√Hz @20dB-gain, which gives a SNR of 66dB @1MHz-bandwidth. Maximum quiescent power consumption is 56μ W. © 2002 IEEE.

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The study of the stable and the metastable ferroelectric polarization of poly(vinylidene fluoride), PVDF, was performed using two successive equal sign ramp voltages, mediated by a short-circuit period. Rates from 10 V/s up to 0.7 MV/s were used. Results showed that they follow different formation kinetics; that the stable part decreases for higher ramp voltage rates and its apparent coercive field increases.

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This paper introduces a method for the supervision and control of devices in electric substations using fuzzy logic and artificial neural networks. An automatic knowledge acquisition process is included which allows the on-line processing of operator actions and the extraction of control rules to replace gradually the human operator. Some experimental results obtained by the application of the implemented software in a simulated environment with random signal generators are presented.

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An active leakage-injection scheme (ALIS) for low-voltage (LV) high-density (HD) SRAMs is presented. By means of a feedback loop comprising a servo-amplifier and a common-drain MOSFET, a current matching the respective bit-line leakage is injected onto the line during precharge and sensing, preventing the respective capacitances from erroneous discharges. The technique is able to handle leakages up to hundreds of μA at high operating temperatures. Since no additional timing is required, read-out operations are performed at no speed penalty. A simplified 256×1bit array was designed in accordance with a 0.35 CMOS process and 1.2V-supply. A range of PSPICE simulation attests the efficacy of ALIS. With an extra power consumption of 242 μW, a 200 μA-leakage @125°C, corresponding to 13.6 times the cell current, is compensated.

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A quasi-sinusoidal linearly tunable OTA-C VCO built with triode-region transconductors is presented. Oscillation upon power-on is ensured by RHP poles associated with gate-drain capacitances of OTA input devices. Since the OTA nonlinearity stabilizes the amplitude, the oscillation frequency f0 is first-order independent of VDD, making the VCO adequate to mixed-mode designs. A range of simulations attests the theoretical analysis. As part of a DPLL, the VCO was prototyped on a 0.8μm CMOS process, occupying an area of 0.15mm2. Nominal f0 is 1MHz, with K VCo=8.4KHz/mV. Measured sensitivity to VDD is below 2.17, while phase noise is -86dBc at 100-KHz offset. The feasibility of the VCO for higher frequencies is verified by a redesign based on a 0.35μm CMOS process and VDD=3.3V, with a linear frequency-span of l3.2MHz - 61.5MHz.

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A low-voltage low-power 2nd-order CMOS pseudo-differential bump-equalizer is presented. Its topology comprises a bandpass section with adjustable center frequency and quality factor, together with a programmable current amplifier. The basic building blocks are triode-operating transconductors, tunable by means of either a DC voltage or a digitally controlled current divider. The bump-equalizer as part of a battery-operated hearing aid device is designed for a 1.4V-supply and a 0.35μm CMOS fabrication process. The circuit performance is supported by a set of simulation results, which indicates a center frequency from 600Hz to 2.4kHz, 1≤Q≤5, and an adjustable gain within ±6dB at center frequency. The filter dynamic range lies around 40dB. Quiescent consumption is kept below 12μW for any configuration of the filter.

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This paper presents an investigation concerning the use of fundamental approximation analysis and a new lamp model for the prediction of the voltage over electrodes' filaments during dimming operation. The lamp model employed in this paper is based on equivalent resistances, which represent the electrodes' filaments and the gas column of a F32T8 lamp. Experimental results are presented in this paper, indicating the validity of the proposed analysis and confirming its potential to serve as an effective tool for the design of dimming electronic ballasts. © 2005 IEEE.

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This paper presents the analysis, design, simulation, and experimental results for a high frequency high Power-Factor (PF) AC (Alternate Current) voltage regulator, using a Sepic converter as power stage. The control technique employed to impose a sinusoidal input current waveform, with low Total Harmonic Distortion (THD), is the sinusoidal variable hysteresis control. The control technique was implemented in a FPGA (Field Programmable Gate Array) device, using a Hardware Description Language (VHDL). Through the use of the proposed control technique, the AC voltage regulator performs active power-factor correction, and low THD in the input current, for linear and non-linear loads, satisfying the requirements of the EEC61000-3-2 standards. Experimental results from an example prototype, designed for 300W of nominal output power, 50kHz (switching frequency), and 127Vrms of nominal input and output voltages, are presented in order to validate the proposed AC regulator. © 2005 IEEE.

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This paper proposes a dedicated algorithm for lation of single line-to-ground faults in distribution systems. The proposed algorithm uses voltage and current phasors measured at the substation level, voltage magnitudes measured at some buses of the feeder, a database containing electrical, operational and topological parameters of the distribution networks, and fault simulation. Voltage measurements can be obtained using power quality devices already installed on the feeders or using voltage measurement devices dedicated for fault location. Using the proposed algorithm, likely faulted points that are located on feeder laterals geographically far from the actual faulted point are excluded from the results. Assessment of the algorithm efficiency was carried out using a 238 buses real-life distribution feeder. The results show that the proposed algorithm is robust for performing fast and efficient fault location for sustained single line-to-ground faults requiring less than 5% of the feeder buses to be covered by voltage measurement devices. © 2006 IEEE.

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An analog circuit that implements a radial basis function network is presented. The proposed circuit allows the adjustment of all shape parameters of the radial functions, i.e., amplitude, center and width. The implemented network was applied to the linearization of a nonlinear circuit, a voltage controlled oscillator (VCO). This application can be classified as an open-loop control in which the network plays the role of the controller. Experimental results have proved the linearization capability of the proposed circuit. Its performance can be improved by using a network with more basis functions. Copyright 2007 ACM.

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In this paper a three-phase power flow for electrical distribution systems considering different models of voltage regulators is presented. A voltage regulator (VR) is an equipment that maintains the voltage level in a predefined value in a distribution line in spite of the load variations within its nominal power. Three different types of connections are analyzed: 1) wye-connected regulators, 2) open delta-connected regulators and 3) closed delta-connected regulators. To calculate the power flow, the three-phase backward/forward sweep algorithm is used. The methodology is tested on the IEEE 34 bus distribution system. ©2008 IEEE.

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This paper deals with the design and analysis of a Dynamic Voltage Restorer output voltage control. Such control is based on a multiloop strategy, with an inner current PID regulator and an outer P+Resonant voltage controller. The inner regulator is applied on the output inductor current. It will be also demonstrated how the load current behavior may influence in the DVR output voltage, which justifies the need for the resonant controller. Additionally, it will be discussed the application of a modified algorithm for the identification of the DVR voltage references, which is based on a previously presented positive sequence detector. Since the studied three-phase DVR is assumed to be based on three identical H-bridge converters, all the analysis and design procedures were realized by means of single-phase equivalent circuits. The discussions and conclusions are supported by theoretical calculations, nonlinear simulations and some experimental results. ©2008 IEEE.

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The purpose of this work is to study voltage control and energy balance of a split DC bus topology within a power electronics equipment connected to the AC mains, such as UPS systems, wind power generators, active filters and FACTS devices. A typical configuration in such equipment has two mains connected converters sharing a common DC bus, one series connected and the other parallel connected. The DC bus is usually composed by a battery or a capacitor bank. In the proposed topology, the DC bus is divided in two sides, interconnected with a buck-boost converter, which controls power flow and DC voltage on both sides. © 2009 IEEE.

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This paper deals with the subject-matter of teaching immaterial issues like power system dynamics where the phenomena and events are not sense-perceptible. The dynamics of the power system are recognized as analogous to the dynamics of a simple mechanical pendulum taken into account the well-known classical model for the synchronous machine. It is shown that even for more sophisticated models including flux decay and Automatic Voltage Regulator the mechanical device can be taken as an analogous, since provided some considerations about variation and control of the pendulum length using certain control laws. The resulting mathematical model represents a mechanical system that can be built for use in laboratory teaching of power system dynamics. © 2010 Praise Worthy Prize S.r.l. - All rights reserved.