Variable-Structure Control Design of Switched Systems With an Application to a DC-DC Power Converter

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Power Factor Correction Boost Converter Based on the Three-State Switching Cell

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Ensino e orientação para projeto de conversores CC-CC através de aplicativos em java

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Immunodominant Antigens of Leishmania chagasi Associated with Protection against Human Visceral Leishmaniasis

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

A 12 kW three-phase low THD rectifier with high-frequency isolation and regulated DC output

A robust 12 kW rectifier with low THD in the line currents, based on an 18-pulse transformer arrangement with reduced kVA capacities followed by a high-frequency isolation stage is presented in this work. Three full-bridge (buck-based) converters are used to allow galvanic isolation and to balance the dc-link currents, without current sensing or current controller. The topology provides a regulated dc output with a very simple and well-known control strategy and natural three-phase power factor correction. The phase-shift PWM technique, with zero-voltage switching is used for the high-frequency dc-dc stage. Analytical results from Fourier analysis of winding currents and the vector diagram of winding voltages are presented. Experimental results from a 12 kW prototype are shown in the paper to verify the efficiency, robustness and simplicity of the command circuitry to the proposed concept.

Programmable PFC based hybrid multipulse power rectifier for ultra clean power application

A novel hybrid three-phase rectifier is proposed. It is capable to achieve high input power factor (PF) and low total harmonic input currents distortion (THDI). The proposed hybrid high power rectifier is composed by a standard three-phase six-pulse diode rectifier (Graetz bridge) with a parallel connection of single-phase Sepic rectifiers in each three-phase rectifier leg. Such topology results in a structure capable of programming the input current waveform and providing conditions for obtaining high input power factor and low harmonic current distortion. In order to validate the proposed hybrid rectifier, this work describes its principles, with detailed operation, simulation, experimental results, and discussions on power rating of the required Sepic converters as related to the desired total harmonic current distortion. It is demonstrated that only a fraction of the output power is processed through the Sepic converters, making the proposed solution economically viable for very high power installations, with fast investment payback. Moreover, retrofitting to existing installations is also feasible since the parallel path can be easily controlled by integration with the existing dc-link. A prototype has been implemented in the laboratory and it was fully demonstrated to both operate with excellent performance and be feasibly implemented in higher power applications.

Mnltiloop Controller and Reference Generator for a Dynamic Voltage Restorer Implementation

This paper deals with the design and analysis of a Dynamic Voltage Restorer output voltage control. Such control is based on a multiloop strategy, with an inner current PID regulator and an outer P+Resonant voltage controller. The inner regulator is applied on the output inductor current. It will be also demonstrated how the load current behavior may influence in the DVR output voltage, which. justifies the need for the resonant controller. Additionally, it will be discussed the application of a modified algorithm for the identification of the DVR voltage references, which is based on a previously presented positive sequence detector. Since the studied three-phase DVR is assumed to be based on three identical H-bridge converters, all the analysis and design procedures were realized by means of single-phase equivalent circuits. The discussions and conclusions are supported by theoretical calculations, nonlinear simulations and some experimental results.

MS2SV: Tradução de modelos em Simulink para VHDL-AMS

This paper presents a methodology and a tool for projects involving analogue and digital signals. A sub-systems group was developed to translation a Matlab/Simulink model in the correspondent structural model described in VHDL-AMS. The developed translation tool, named of MS(2)SV, can reads a file containing a Simulink model translating it in the correspondent VHDL-AMS structural code. The tool also creates the directories structure and necessary files to simulate the model translated in System Vision environment. Three models of D/A converters available commercially that use R-2R ladder network were studied. This work considers some of challenges set by the electronic industry for the further development of simulation methodologies and tools in the field of mixed-signal technology. Although the objective of the studies has been the D/A converter, the developed methodology has potentiality to be extended to consider control systems and mechatronic systems.

A unity power factor multiple isolated outputs switching mode power supply using a single switch

The authors present an offline switching power supply with multiple isolated outputs and unity power factor with the use of only one power processing stage, based on the DC-DC SEPIC (single ended primary inductance converter) modulated by variable hysteresis current control. The principle of operation, the theoretical analysis, the design procedure, an example, and simulation results are presented. A laboratory prototype, rated at 160 W, operating at a maximum switching frequency of 100 kHz, with isolated outputs rated at +5 V/15 A -5 V/1 A, +12 V/6 A and -12 V/1 A, has been built given an input power factor near unity.

Static converter: didactic support software

Teaching a course of special electric loads in a continuing education program to power engineers is a difficult task because they are not familiarized with switching topology circuits. Normally, in a typical program, many hours are dedicated to explain the thyristors switching sequence and to draw the converter currents and terminal voltages waveforms for different operative conditions. This work presents teaching support software in order to optimize the time spent in this task and, mainly to benefit the assimilation of the proposed subjects, studying the static converter under different non-ideal operative conditions.

Uma aplicacao da celula de comutacao ZVS-PWM-GEPAE ao conversor DC-AC

This work presents the design and procedure of a DC-to-AC converter using a ZVS Commutation Cell developed by Barbi and Martins (1991) and applied to the family of DC-to-DC PWM converters. Firstly, we show the cell applied to buck converter. The stages of operation and the main current and voltage equations of the resonant devices are presented. Next, we adapt the converter to the regenerative operation mode. Hence, the full bridge converter at low frequency operation is conected on the DC-to-DC stage (at high frequency) output ends (Seixas, 1993). Commutation of zero voltage for all switches, PWM at constant frequency and neither overvoltage nor additional current stress are observed by digital simulation. The design example and experimental results obtained by prototype rated at 275 V, 1 kW and 40 kHz are also presented.

On optimizing micropower MOS regulated cascode circuits on switched current techniques

Trade-off between settling time and micropower consumption in MOS regulated cascode current sources as building parts in high-accuracy, current-switching D/A converters is analyzed. The regulation-loop frequency characteristic is obtained and difficulties to impose a dominant-pole condition to the resulting 2nd-order system are discussed. Raising pole frequencies while meeting consumption requirements is basically limited by parasitic capacitances. An alternative is found by imposing a twin-pole system in which design constraints are somewhat relaxed and settling slightly faster. Relationships between pole frequencies, transistor geometry and bias are established. Simulated waveforms obtained with PSpice of designed circuits following a voltage perturbation suggest a good agreement with theory. The proposed approach applied to the design of a micropower current-mode D/A converter improves its simulated settling performance.

New family of zero-current-switching PWM converter

A new family of dc-to-dc pulse-width-modulated (PWM) converters is presented. These converters feature soft-commutation at zero-current (ZC) in the active switches. The new ZCS-PWM Boost and new ZCS-PWM Zeta converters, both based on the new ZCS-PWM soft-commutation cell proposed, are used as examples to illustrate the operation of the new family of converters.

New 12kW three-phase 18-pulse high power factor AC-DC converter with regulated output voltage for rectifier units

This work presents a new high power factor three-phase rectifier based on a Y-connected differential autotransformer with reduced kVA and 18-pulse input current followed by three DC-DC boost converters. The topology provides a regulated output voltage and natural three-phase input power factor correction. The lowest input current harmonic components are the 17th and the 19th. Three boost converters, with constant input currents and regulated parallel connected output voltages are used to process 4kW each one. Analytical results from Fourier analyses of winding currents and the vector diagram of winding voltages are presented. Simulation results to verify the proposed concept and experimental results are shown in the paper.

On designing OTA-C graphic-equalizers with MOSFET-triode transconductors

A CMOS audio-equalizer based on a parallel-array of 2nd-order bandpass-sections is presented and realized with triode transconductors. It has a programmable 12db-boost/cut on each of its three decade-bands, easily achieved through the linear dependence of gm on VDS. In accordance with a 0.8μm n-well double-metal fabrication process, a range of simulations supports theoretical analysis and circuit performance at different boost/cut scenarios. For VDD=3.3V, fullboosting stand-by prover consumption is 1.05mW. THD=-42.61dB@1Vpp and may be improved by balanced structures. Thermal- and I/f-noise spectral densities are 3.2μV/Hz12 and 18.2μV/Hz12@20Hz, respectively, for a dynamic range of 52.3dB@1Vpp. The equalizer effective area is 2.4mm2. The drawback of the existing transmission-zero due to the feedthrough-capacitance of a triode input-device is also addressed. The proposed topology can be extended to the design of more complex graphic-equalizers and hearing-aids.