5 resultados para Amplificador de transimpedância
em Universidade Federal do Rio Grande do Norte(UFRN)
Resumo:
This work deals with the research and development of a Pulse Width Programmable Gain Integrating Amplifier. Two Pulse Width Programmable Gain Amplifier architectures are proposed, one based on discrete components and another based on switched capacitors. From the operating requirements defined for the study, parameters are defined and simulations are carried out to validate the architecture. Subsequently, the circuit and the software are developed and tested. It is performed the evaluation of the circuits regarding the two proposed architectures, and from that, an architecture is selected to be improved, aiming the development of an integrated circuit in a future work.
Resumo:
This work presents simulation results of an identification platform compatible with the INPE Brazilian Data Collection System, modeled with SystemC-AMS. SystemC-AMS that is a library of C++ classes dedicated to the simulation of heterogeneous systems, offering a powerful resource to describe models in digital, analog and RF domains, as well as mechanical and optic. The designed model was divided in four parts. The first block takes into account the satellite s orbit, necessary to correctly model the propagation channel, including Doppler effect, attenuation and thermal noise. The identification block detects the satellite presence. It is composed by low noise amplifier, band pass filter, power detector and logic comparator. The controller block is responsible for enabling the RF transmitter when the presence of the satellite is detected. The controller was modeled as a Petri net, due to the asynchronous nature of the system. The fourth block is the RF transmitter unit, which performs the modulation of the information in BPSK ±60o. This block is composed by oscillator, mixer, adder and amplifier. The whole system was simulated simultaneously. The results are being used to specify system components and to elaborate testbenchs for design verification
Resumo:
This work proposes a new methodology to verify those analog circuits, providing an automated tools to help the verifiers to have a more truthful result. This work presents the development of new methodology for analog circuits verification. The main goal is to provide a more automated verification process to certify analog circuits functional behavior. The proposed methodology is based on the golden model technique. A verification environment based on this methodology was built and results of a study case based on the validation of an operational amplifier design are offered as a confirmation of its effectiveness. The results had shown that the verification process was more truthful because of the automation provided by the tool developed
Resumo:
In the 20th century, the acupuncture has spread on occident as a complementary practice of heath care. This fact has motivated the international scientific community to invest in research that seek to understand why acupuncture works. In this work we compare statistically volt age fluctuation of bioelectric signals caught on the skin at an acupuncture point (IG 4) another nearby on acupuncture point. The acquisition of these signals was performed utilizing an electronic interface with a computer, which was based on an instrumentation amplifier designed with adequate specifications to this end. On the collected signals from a sample of 30 volunteers we have calculated major statistics and submitted them to pairing t-test with significance leveI a = O, 05. We have estimated to bioelectric signals the following parameters: standard deviation, asymmetry and curtose. Moreover, we have calculated the self-correlation function matched by on exponential curve we have observed that the signal decays more rapidly from a non-acupoint then from an acupoint. This fact is an indicative of the existence of information in the acupoint
Resumo:
The Brazilian Environmental Data Collecting System (SBCDA) collects and broadcasts meteorological and environmental data, to be handled by dozens of institutions and organizations. The system space segment, composed by the data collecting satellites, plays an important role for the system operation. To ensure the continuity and quality of these services, efforts are being made to the development of new satellite architectures. Aiming a reduction of size and power consumption, the design of an integrated circuit containing a receiver front-end is proposed, to be embedded in the next SBCDA satellite generations. The circuit will also operate under the requirements of the international data collecting standard ARGOS. This work focuses on the design of an UHF low noise amplifier and mixers in a CMOS standard technology. The specifi- cations are firstly described and the circuit topologies presented. Then the circuit conception is discussed and the design variables derived. Finally, the layout is designed and the final results are commented. The chip will be fabricated in a 130 nm technology from ST Microelectronics.