91 resultados para Circuitos integrados de alta velocidade
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The continuous evolution of integrated circuit technology has allowed integrating thousands of transistors on a single chip. This is due to the miniaturization process, which reduces the diameter of wires and transistors. One drawback of this process is that the circuit becomes more fragile and susceptible to break, making the circuit more susceptible to permanent faults during the manufacturing process as well as during their lifetime. Coarse Grained Reconfigurable Architectures (CGRAs) have been used as an alternative to traditional architectures in an attempt to tolerate such faults due to its intrinsic hardware redundancy and high performance. This work proposes a fault tolerance mechanism in a CGRA in order to increase the architecture fault tolerance even considering a high fault rate. The proposed mechanism was added to the scheduler, which is the mechanism responsible for mapping instructions onto the architecture. The instruction mapping occurs at runtime, translating binary code without the need for recompilation. Furthermore, to allow faster implementation, instruction mapping is performed using a greedy module scheduling algorithm, which consists of a software pipeline technique for loop acceleration. The results show that, even with the proposed mechanism, the time for mapping instructions is still in order of microseconds. This result allows that instruction mapping process remains at runtime. In addition, a study was also carried out mapping scheduler rate. The results demonstrate that even at fault rates over 50% in functional units and interconnection components, the scheduler was able to map instructions onto the architecture in most of the tested applications.
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Telecommunication is one of the most dynamic and strategic areas in the world. Many technological innovations has modified the way information is exchanged. Information and knowledge are now shared in networks. Broadband Internet is the new way of sharing contents and information. This dissertation deals with performance indicators related to maintenance services of telecommunications networks and uses models of multivariate regression to estimate churn, which is the loss of customers to other companies. In a competitive environment, telecommunications companies have devised strategies to minimize the loss of customers. Loosing customers presents a higher cost than obtaining new ones. Corporations have plenty of data stored in a diversity of databases. Usually the data are not explored properly. This work uses the Knowledge Discovery in Databases (KDD) to establish rules and new models to explain how churn, as a dependent variable, are related to a diversity of service indicators, such as time to deploy the service (in hours), time to repair (in hours), and so on. Extraction of meaningful knowledge is, in many cases, a challenge. Models were tested and statistically analyzed. The work also shows results that allows the analysis and identification of which quality services indicators influence the churn. Actions are also proposed to solve, at least in part, this problem
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Abstract
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In this work, the transmission line method is explored on the study of the propagation phenomenon in nonhomogeneous walls with finite thickness. It is evaluated the efficiency and applicability of the method, considering materials like gypsum, wood and brick, found in the composition of the structures of walls in question. The results obtained in this work are compared to those available in the literature, for several particular cases. A good agreement is observed, showing that the performed analysis is accurate and efficient in modeling, for instance, the wave propagation through building walls and integrated circuit layers in mobile communication and radar system applications. Later, simulations of resistive sheets devices such as Salisbury screens and Jaumann absorbers and of transmission lines made of metal-insulator-semiconductor (MIS) are made. Thereafter, it is described a study on frequency surface selective structures (FSS). It is proposed the development of devices and microwave integrated circuits (MIC) of such structures, for the accomplishment of experiments. Finally, future works are suggested, for instance, on the development of reflectarrays, frequency selective surfaces with dissimilar elements, and coupled frequency selective surfaces with elements located on different layers
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Low voltage solar panels increase the reliability of solar panels due to reduction of in series associations the configurations of photovoltaic cells. The low voltage generation requires DCDC converters devices with high efficiency, enabling raise and regulate the output voltage. This study analyzes the performance of a photovoltaic panel of Solarex, MSX model 77, configured to generate an open circuit voltage of 10.5 V, with load voltage of 8.5 V, with short circuit current of 9 A and a power of 77 W. The solar panel was assembled in the isolated photovoltaic system configuration, with and without energy storage as an interface with a DCDC converter, Booster topology. The converter was designed and fabricated using SMD (Surface Mounted Devices) technology IC (integrated circuit) that regulates its output voltage at 14.2 V, with an efficiency of 87% and providing the load a maximum power of 20.88 W. The system was installed and instrumented for measurement and acquisition of the following data: luminosities, average global radiation (data of INPE Instituto Nacional de Pesquisas Espaciais), solar panel and environment temperatures, solar panel and DC-DC converter output voltages, panel, inverter, and battery charge output currents. The photovoltaic system was initially tested in the laboratory (simulating its functioning in ideal conditions of operation) and then subjected to testing in real field conditions. The panel inclination angle was set at 5.5°, consistent with the latitude of Natal city. Factors such as climatic conditions (simultaneous variations of temperature, solar luminosities and ra diation on the panel), values of load resistance, lower limit of the maximum power required by the load (20.88 W) were predominant factors that panel does not operate with energy efficiency levels greater than 5 to 6%. The average converter efficiency designed in the field test reached 95%
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To obtain a process stability and a quality weld bead it is necessary an adequate parameters set: base current and time, pulse current and pulse time, because these influence the mode of metal transfer and the weld quality in the MIG-P, sometimes requiring special sources with synergistic modes with external control for this stability. This work aims to analyze and compare the effects of pulse parameters and droplet size in arc stability in MIG-P, four packets of pulse parameters were analysed: Ip = 160 A, tp = 5.7 ms; Ip = 300 A and tp = 2 ms, Ip = 350 A, tp = 1.2 ms and Ip = 350 A, tp = 0.8 ms. Each was analyzed with three different drop diameters: drop with the same diameter of the wire electrode; droplet diameter larger drop smaller than the diameter of the wire electrode. For purposes of comparison the same was determined relation between the average current and welding speed was determined generating a constant (Im / Vs = K) for all parameters. Welding in flat plate by simple deposition for the MIG-P with a distance beak contact number (DBCP) constant was perfomed subsequently making up welding in flat plate by simple deposition with an inclination of 10 degrees to vary the DBCP, where by assessment on how the MIG-P behaved in such a situation was possible, in addition to evaluating the MIG-P with adaptive control, in order to maintain a constant arc stability. Also high speed recording synchronized with acquiring current x voltage (oscillogram) was executed for better interpretation of the transfer mechanism and better evaluation in regard to the study of the stability of the process. It is concluded that parameters 3 and 4 exhibited greater versatility; diameters drop equal to or slightly less than the diameter of the wire exhibited better stability due to their higher frequency of detachment, and the detachment of the drop base does not harm the maintenance the height of the arc
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The objective of this study was to evaluate the displacement of petroleum/diesel solutions, at different concentrations, observing the effect of ultrasonic vibrations in fluids present in porous media to obtain an increase in oil production. The bubbles produced by ultrasound implode asymmetrically in the rock, generating liquid jets with high speed, displacing the oil present in porous media. The oil/diesel solutions were prepared with concentrations ranging from 20 g/L to 720 g/L in oil in relation to diesel and its viscosities were obtained in a Brookfield Rheometer RS2000, with temperature ranging from 25 to 55 °C. After, calculations were performed to obtain the activation energy data for oil/diesel solutions. For oil recovery experiments, cylindrical samples of porous rock (core samples), with resin around the perimeter and its two circular bases free to allow the passage of fluids, were first saturated with 2% KCl solution and after with oil solutions. The results of oil extraction were satisfactory for all studied solutions, being obtained up to 68% partial displacement with saline solution injection. The ultrasound system was used after saline injection, increasing oil displacement, with oil extractions ranging from 63% to 79%. During the experiments, it was observed the warming of core samples, helping to reduce the viscosity of more concentrated systems, and consequently enhancing the percentage of advanced recovery for all studied solutions
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Several works characterize the presence of spinner dolphins at Fernando de Noronha Archipelago in the Dolphins Bay. Though, the dolphins abidance inside this cove has decreased and a new area has been occupied by the animals to achieve the same behaviors, that are resting, breeding and nursing. This area comprises the Inside Sea northeast border of Fernando s de Noronha Island, including the opposing Middle and Dog shore area, the San Antonio Bay and the Between Islands region. The aim was to characterize the dolphins occupation and describe their interactions with the tourism in this area. Data were collected in 2008 and 2009 through a fixed point observation. The study area was divided into seven sub-areas, recording: presence/absence of dolphins, days abidance endurance, abidance length in each area, estimated number of individuals, dolphins direction and speed of displacement, boats presence, interaction period, monitoring, boats attitude and velocity. The dolphins abidance time displayed the same pattern during both years of study, with the higher occupancy in the Between Islands region. Groups with farther than 200 individuals were more frequent both 2008 (46.2%) and 2009 (42.3%). Thus the displacement s slow speed as the preferred direction towards Rat Island also showed the same pattern in both years. The Between Islands region also presented the boats major abidance near the dolphins groups. Boats moved farther in slow speed (95%) than at high speed (5%). The legislation s compliance for the cetaceans protection occurred in 89.7% of 2.839 interactions between boats and spinners, in which this variable was recorded. Whenever boats moved at a slow speed during the meetings with spinner dolphins groups, animals also moved at a slow speed (n = 337), significantly more than the fast displacements (n = 128) ix or "porpoise" (n = 4) (X2 = 318.543, p = -0.001). When boats quickly passed by groups, a significant difference between the dolphins displacement speeds was observed (X2 = 18.264, p =- 0.001), however, the slow (47%) and fast (47% ) displacements frequency was equal, noted the difference with the porpoise displacements (6%), which had the lowest frequency. Data indicate the establishment of a new occupation pattern of the spinner dolphins at Fernando de Noronha, with the Between Islands area being of great importance to the dolphins habits and currently the main area of the boats meeting with the dolphins, showing the need of new conservation measures in this area
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The increasingly request for processing power during last years has pushed integrated circuit industry to look for ways of providing even more processing power with less heat dissipation, power consumption, and chip area. This goal has been achieved increasing the circuit clock, but since there are physical limits of this approach a new solution emerged as the multiprocessor system on chip (MPSoC). This approach demands new tools and basic software infrastructure to take advantage of the inherent parallelism of these architectures. The oil exploration industry has one of its firsts activities the project decision on exploring oil fields, those decisions are aided by reservoir simulations demanding high processing power, the MPSoC may offer greater performance if its parallelism can be well used. This work presents a proposal of a micro-kernel operating system and auxiliary libraries aimed to the STORM MPSoC platform analyzing its influence on the problem of reservoir simulation
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The increasing complexity of integrated circuits has boosted the development of communications architectures like Networks-on-Chip (NoCs), as an architecture; alternative for interconnection of Systems-on-Chip (SoC). Networks-on-Chip complain for component reuse, parallelism and scalability, enhancing reusability in projects of dedicated applications. In the literature, lots of proposals have been made, suggesting different configurations for networks-on-chip architectures. Among all networks-on-chip considered, the architecture of IPNoSys is a non conventional one, since it allows the execution of operations, while the communication process is performed. This study aims to evaluate the execution of data-flow based applications on IPNoSys, focusing on their adaptation against the design constraints. Data-flow based applications are characterized by the flowing of continuous stream of data, on which operations are executed. We expect that these type of applications can be improved when running on IPNoSys, because they have a programming model similar to the execution model of this network. By observing the behavior of these applications when running on IPNoSys, were performed changes in the execution model of the network IPNoSys, allowing the implementation of an instruction level parallelism. For these purposes, analysis of the implementations of dataflow applications were performed and compared
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The great interest observed in wireless communication systems has required the development of new configurations of microstrip antennas, because they are easily built and integrated to other microwave circuit components, which is suitable for the construction and development of planar antenna arrays and microwave integrated circuits. This work presents a new configuration of tapered microstrip antenna, which is obtained by impressing U-slots on the conducting patch combined with a transmission line matching circuit that uses an inset length. It is shown that the use of U-slots in the microstrip antenna conducting patch excites new resonating modes, that gives a multiband characteristic for the slotted microstrip antenna, that is suitable for applications in communication systems that operates several frequencies simultaneously. Up to this date, the works reported in the literature deals with the use of Uslotted microstrip rectangular antennas fed by a coaxial probe. The properties of a linear array of microstrip patch tapered antennas are also investigated. The main parameters of the U slotted tapered microstrip antennas are investigated for different sizes and locations of the slots impressed on the conducting patch. The analysis of the proposed antenna is performed by using the resonant cavity and equivalent transmission line methods, in combination with a parametric study, that is conducted by the use of the Ansoft Designer, a commercial computer aided microwave software well known by its accuracy and efficiency. The mentioned methods are used to evaluate the effect in the antennas parameters, like resonant frequency and return loss, produced by variations of the antenna structural parameters, accomplished separately or simultaneously. An experimental investigation is also developed, that consists of the design, construction and measurement of several U slotted microstrip antenna prototypes. Finally, theoretical and simulated results are presented that are in agreement with the measured ones. These results are related to the resonating modes identification and to the determination of the main characteristics of the investigated antennas, such as resonant frequency, return loss, and radiation pattern
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For contain beneficial properties, aluminum alloys are gaining more importance in different industrial areas, becoming the subject of study in several academic fields. When related to welding these alloys have some peculiarities that may hinder the union, such as microscopic oxide layer present on the metal surface. The MIG welding process, also known as GMAW, has developed versions that can be effective for welding aluminum. Knowing this, for this paper, two versions of pulsed MIG (CC + and CA) were chosen to evaluate which best suits pass by filling bevel on AA5083 aluminum sheets with 8 and 12 mm thick respectively. Furthermore, two types of wire, ER5087 and ER5183 were evaluated. To evaluate the process and versions of the wires, the high-speed cameras and thermal were used to monitor the metal transfer and the thermal behavior respectively, and the metallographic analysis for macrographic view of the weld beads and non-destructive testing by radiography for observation of possible discontinuities. It was found that the technique of MIG-P CA showed better results ahead of another technique both welding conditions imposed. When connected to the wires, they showed similar results, with uniform cords and seamless
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This work deals with the research and development of a Pulse Width Programmable Gain Integrating Amplifier. Two Pulse Width Programmable Gain Amplifier architectures are proposed, one based on discrete components and another based on switched capacitors. From the operating requirements defined for the study, parameters are defined and simulations are carried out to validate the architecture. Subsequently, the circuit and the software are developed and tested. It is performed the evaluation of the circuits regarding the two proposed architectures, and from that, an architecture is selected to be improved, aiming the development of an integrated circuit in a future work.
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The Artificial Neural Networks (ANN), which is one of the branches of Artificial Intelligence (AI), are being employed as a solution to many complex problems existing in several areas. To solve these problems, it is essential that its implementation is done in hardware. Among the strategies to be adopted and met during the design phase and implementation of RNAs in hardware, connections between neurons are the ones that need more attention. Recently, are RNAs implemented both in application specific integrated circuits's (Application Specific Integrated Circuits - ASIC) and in integrated circuits configured by the user, like the Field Programmable Gate Array (FPGA), which have the ability to be partially rewritten, at runtime, forming thus a system Partially Reconfigurable (SPR), the use of which provides several advantages, such as flexibility in implementation and cost reduction. It has been noted a considerable increase in the use of FPGAs for implementing ANNs. Given the above, it is proposed to implement an array of reconfigurable neurons for topologies Description of artificial neural network multilayer perceptrons (MLPs) in FPGA, in order to encourage feedback and reuse of neural processors (perceptrons) used in the same area of the circuit. It is further proposed, a communication network capable of performing the reuse of artificial neurons. The architecture of the proposed system will configure various topologies MLPs networks through partial reconfiguration of the FPGA. To allow this flexibility RNAs settings, a set of digital components (datapath), and a controller were developed to execute instructions that define each topology for MLP neural network.
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The Artificial Neural Networks (ANN), which is one of the branches of Artificial Intelligence (AI), are being employed as a solution to many complex problems existing in several areas. To solve these problems, it is essential that its implementation is done in hardware. Among the strategies to be adopted and met during the design phase and implementation of RNAs in hardware, connections between neurons are the ones that need more attention. Recently, are RNAs implemented both in application specific integrated circuits's (Application Specific Integrated Circuits - ASIC) and in integrated circuits configured by the user, like the Field Programmable Gate Array (FPGA), which have the ability to be partially rewritten, at runtime, forming thus a system Partially Reconfigurable (SPR), the use of which provides several advantages, such as flexibility in implementation and cost reduction. It has been noted a considerable increase in the use of FPGAs for implementing ANNs. Given the above, it is proposed to implement an array of reconfigurable neurons for topologies Description of artificial neural network multilayer perceptrons (MLPs) in FPGA, in order to encourage feedback and reuse of neural processors (perceptrons) used in the same area of the circuit. It is further proposed, a communication network capable of performing the reuse of artificial neurons. The architecture of the proposed system will configure various topologies MLPs networks through partial reconfiguration of the FPGA. To allow this flexibility RNAs settings, a set of digital components (datapath), and a controller were developed to execute instructions that define each topology for MLP neural network.