4 resultados para cascode

em Deakin Research Online - Australia


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In this paper, a new gain enhancement technique which is recommended for folded cascode LNA structures at low voltage and low power applications is presented. In order to increase power gain, a new modified version of gm-boosting technique is employed which increases the power gain while consuming no extra power. The new topology shares its DC current at the folded stage in order to reduce power dissipation associated with the gm-boosting technique. The proposed technique reduces power dissipation almost 27%, additionally; other parameters such as power gain and noise figure have been slightly improved. In the proposed LNA, power gain and noise figure are15dB and 3.2dB respectively. It consumes 1.3mW under 0.6 supply voltage.

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An important problem in designing RFIC in CMOS technology is the parasitic elements of passive and active devices that complicate design calculations. This article presents three LNA topologies including cascode, folded cascade, and differential cascode and then introduces image rejection filters for low-side and high-side injection. Then, a new method for design and optimization of the circuits based on a Pareto-based multiobjective genetic algorithm is proposed. A set of optimum device values and dimensions that best match design specifications are obtained. The optimization method is layout aware, parasitic aware, and simulation based. Circuit simulations are carried out based on TSMC 0.18 um CMOS technology by using Hspice.

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A highly linear, low voltage, low power, low noise amplifier (LNA) using a novel nonlinearity cancellation technique is presented in this paper. Parallel Inductor (PI) matching is used to increase LNA gain by 3dB at the desired frequency. The linear LNA was designed and simulated in a TSMC 0.18μm CMOS process at 5GHz frequency. By employing the proposed technique, the IIP3 is improved by 12dB in contrast to the conventional folded cascode LNA, reaching −1dBm without having any significant effect on the other LNA parameters such as gain, NF and also power consumption. The proposed LNA also delivers a voltage gain (S21) of 12.25dB with a noise figure of 3.5dB, while consuming only 1.28mW of DC power with a low supply voltage of 0.6V.