Blind equalisation of multilevel PAM data for nonminimum phase channels via second- and fourth-order cumulants

This paper introduces a new blind equalisation algorithm for the pulse amplitude modulation (PAM) data transmitted through nonminimum phase (NMP) channels. The algorithm itself is based on a noncausal AR model of communication channels and the second- and fourth-order cumulants of the received data series, where only the diagonal slices of cumulants are used. The AR parameters are adjusted at each sample by using a successive over-relaxation (SOR) scheme, a variety of the ordinary LMS scheme, but with a faster convergence rate and a greater robustness to the selection of the ‘step-size’ in iterations. Computer simulations are implemented for both linear time-invariant (LTI) and linear time-variant (LTV) NMP channels, and the results show that the algorithm proposed in this paper has a fast convergence rate and a potential capability to track the LTV NMP channels.

Purpose built teaching equipment for a laboratory based course in three phase machines and drives

The hazards associated with high voltage three phase inverters and the rotating shafts of large electrical machines have resulted in most of the engineering courses covering these topics to be predominantly theoretical. This paper describes a set of purpose built, low voltage and low cost teaching equipment which allows the "hands on" instruction of three phase inverters and rotating machines. By using low voltages, the student can experiment freely with the motors and inverter and can access all of the current and voltage waveforms, which until now could only be studied in text books or observed as part of laboratory demonstrations. Both the motor and the inverter designs are optimized for teaching purposes cost around $25 and can be made with minimal effort.

Design, implementation and characterisation of a contactless power transfer system for rotating applications

This paper describes the design, implementation and characterisation of a contactless power transfer system for rotating applications. The power transfer system is based upon a zero-voltage-switched, full-bridge, DC-DC converter, but utilises a non-standard transformer. This transformer allows power transfer between its primary and secondary windings while also allowing free rotation between these windings. The aim of this research is to develop a solution that could replace mechanical slip-rings in certain applications where a non-contacting system would be advantageous. Based upon the design method presented in this paper, a 2 kW prototype system is constructed. Results obtained from testing the 2 kW prototype are presented and discussed. This discussion considers how the performance of the transformer varies with rotation and also the overall efficiency of the system

Study of the variation of the input impedance of induction machines with frequency

The results of a study of the variation of three-phase induction machines' input impedance with frequency are proposed. A range of motors were analysed, both two-pole and four-pole, and the magnitude and phase of the input impedance were obtained over a wide frequency range of 20 Hz-1 MHz. For test results that would be useful in the prediction of the performance of induction machines during typical use, a test procedure was developed to represent closely typical three-phase stator coil connections when the induction machine is driven by a three-phase inverter. In addition, tests were performed with the motor's cases both grounded and not grounded. The results of the study show that all induction machines of the type considered exhibit a multiresonant impedance profile, where the input impedance reaches at least one maximum as the input frequency is increased. Furthermore, the test results show that the grounding of the motor's case has a significant effect on the impedance profile. Methods to exploit the input impedance profile of an induction machine to optimise machine and inverter systems are also discussed.

Systolic random number generation for genetic algorithms

A parallel hardware random number generator for use with a VLSI genetic algorithm processing device is proposed. The design uses an systolic array of mixed congruential random number generators. The generators are constantly reseeded with the outputs of the proceeding generators to avoid significant biasing of the randomness of the array which would result in longer times for the algorithm to converge to a solution. 1 Introduction In recent years there has been a growing interest in developing hardware genetic algorithm devices [1, 2, 3]. A genetic algorithm (GA) is a stochastic search and optimization technique which attempts to capture the power of natural selection by evolving a population of candidate solutions by a process of selection and reproduction [4]. In keeping with the evolutionary analogy, the solutions are called chromosomes with each chromosome containing a number of genes. Chromosomes are commonly simple binary strings, the bits being the genes.

A double data rate (DDR) architecture for OFDM based wireless consumer devices

The creation of OFDM based Wireless Personal Area Networks (WPANs) has allowed the development of high bit-rate wireless communication devices suitable for streaming High Definition video between consumer products, as demonstrated in Wireless-USB and Wireless-HDMI. However, these devices need high frequency clock rates, particularly for the OFDM, FFT and symbol processing sections resulting in high silicon cost and high electrical power. The high clock rates make hardware prototyping difficult and verification is therefore very important but costly. Acknowledging that electrical power in wireless consumer devices is more critical than the number of implemented logic gates, this paper presents a Double Data Rate (DDR) architecture for implementation inside a OFDM baseband codec in order to reduce the high frequency clock rates by a complete factor of 2. The presented architecture has been implemented and tested for ECMA-368 (Wireless- USB context) resulting in a maximum clock rate of 264MHz instead of the expected 528MHz clock rate existing anywhere on the baseband codec die.

Improved and optimal dual circular 32-QAM for MB-OFDM

Quadrature Phase Shift Keying (QPSK) and Dual Carrier Modulation (DCM) are currently used as the modulation schemes for Multiband Orthogonal Frequency Division Multiplexing (MB-OFDM) in the ECMA-368 defined Ultra-Wideband (UWB) radio platform. ECMA-368 has been chosen as the physical radio platform for many systems including Wireless USB (W-USB), Bluetooth 3.0 and Wireless HDMI; hence ECMA-368 is an important issue to consumer electronics and the users’ experience of these products. To enable the transport of high-rate USB, ECMA-368 offers up to 480 Mb/s instantaneous bit rate to the Medium Access Control (MAC) layer, but depending on radio channel conditions dropped packets unfortunately result in a lower throughput. This paper presents improvement on a high data rate modulation scheme that fits within the configuration of the current standard increasing system throughput by achieving 600 Mb/s (reliable to 3.2 meters) thus maintaining the high rate USB throughput even with a moderate level of dropped packets. The modulation system is termed improved and optimal Dual Circular 32-QAM (DC 32-QAM). The system performance for improved and optimal DC 32-QAM modulation is presented and compared with previous DC 32- QAM, 16-QAM and DCM.

A double data rate (DDR) architecture for OFDM based wireless consumer devices

The creation of OFDM based Wireless Personal Area Networks (WPANs) has allowed high bit-rate wireless communication devices suitable for streaming High Definition video between consumer products as demonstrated in Wireless- USB. However, these devices need high clock rates, particularly for the OFDM sections resulting in high silicon cost and high electrical power. Acknowledging that electrical power in wireless consumer devices is more critical than the number of implemented logic gates, this paper presents a Double Data Rate (DDR) architecture to reduce the OFDM input and output clock rate by a factor of 2. The architecture has been implemented and tested for Wireless-USB (ECMA-368) resulting in a maximum clock of 264MHz instead of 528MHz existing anywhere on the die.

Fixed point dual carrier modulation performance for wireless USB

Dual Carrier Modulation (DCM) is currently used as the higher data rate modulation scheme for Multiband Orthogonal Frequency Division Multiplexing (MB-OFDM) in the ECMA-368 defined Ultra-Wideband (UWB) radio platform. ECMA-368 has been chosen as the physical radio platform for many systems including Wireless USB (W-USB), Bluetooth 3.0 and Wireless HDMI; hence ECMA-368 is an important issue to consumer electronics and the user’s experience of these products. In this paper, Log Likelihood Ratio (LLR) demapping method is used for the DCM demaper implemented in fixed point model. Channel State Information (CSI) aided scheme coupled with the band hopping information is used as the further technique to improve the DCM demapping performance. The receiver performance for the fixed point DCM is simulated in realistic multi-path environments.

Semiotic modelling for complex enterprise systems

An enterprise is viewed as a complex system which can be engineered to accomplish organisational objectives. Systems analysis and modelling will enable to the planning and development of the enterprise and IT systems. Many IT systems design methods focus on functional and non-functional requirements of the IT systems. Most methods are normally capable of one but leave out other aspects. Analysing and modelling of both business and IT systems may often have to call on techniques from various suites of methods which may be placed on different philosophic and methodological underpinnings. Coherence and consistency between the analyses are hard to ensure. This paper introduces the Problem Articulation Method (PAM) which facilitates the design of an enterprise system infrastructure on which an IT system is built. Outcomes of this analysis represent requirements which can be further used for planning and designing a technical system. As a case study, a finance system, Agresso, for e-procurement has been used in this paper to illustrate the applicability of PAM in modelling complex systems.

Modelling complex systems for project planning - A semiotics motivated method

A large and complex IT project may involve multiple organizations and be constrained within a temporal period. An organization is a system comprising of people, activities, processes, information, resources and goals. Understanding and modelling such a project and its interrelationship with relevant organizations are essential for organizational project planning. This paper introduces the problem articulation method (PAM) as a semiotic method for organizational infrastructure modelling. PAM offers a suite of techniques, which enables the articulation of the business, technical and organizational requirements, delivering an infrastructural framework to support the organization. It works by eliciting and formalizing (e. g. processes, activities, relationships, responsibilities, communications, resources, agents, dependencies and constraints) and mapping these abstractions to represent the manifestation of the "actual" organization. Many analysts forgo organizational modelling methods and use localized ad hoc and point solutions, but this is not amenable for organizational infrastructures modelling. A case study of the infrared atmospheric sounding interferometer (IASI) will be used to demonstrate the applicability of PAM, and to examine its relevancy and significance in dealing with the innovation and changes in the organizations.