Fixed bed reactor performance of invertase immobilized on montmorillonite

Invertase was immobilized on acid activated montmorillonite via two independent procedures, adsorption and covalent binding. The immobilized enzymes were characterized by XRD, NMR and N2 adsorption measurements and their activity was tested in a fixed bed reactor. XRD revealed that the enzyme was situated on the periphery of the clay and the side chains of different amino acid residues were involved in intercalation with the clay matrix. NMR demonstrated that tetrahedral Al was linked to the enzyme during adsorption and the octahedral Al was involved during covalent binding. Secondary interaction of the enzyme with Al was also observed. N2 adsorption studies showed that covalent binding of enzymes caused pore blockage since the highly polymeric species were located at the pore entrance. The fixed bed reactor proved to be efficient for the immobilized invertase. The optimum pH and pH stability improved upon immobilization. The kinetic parameters calculated also showed an enhanced efficiency of the immobilized systems. They could be used continuously for long period. Covalently bound invertase demonstrated greater operational stability.

Glucoamylase immobilized on montmorillonite: Synthesis, characterization and starch hydrolysis activity in a fixed bed reactor

Glucoamylase from Aspergillus Niger was immobilized on montmorillonite clay (K-10) by two procedures, adsorption and covalent binding. The immobilized enzymes were characterized using XRD, surface area measurements and 27Al MAS NMR and the activity of the immobilized enzymes for starch hydrolysis was tested in a fixed bed reactor (FBR). XRD shows that enzyme intercalates into the inter-lamellar space of the clay matrix with a layer expansion up to 2.25 nm. Covalently bound glucoamylase demonstrates a sharp decrease in surface area and pore volume that suggests binding of the enzyme at the pore entrance. NMR studies reveal the involvement of octahedral and tetrahedral Al during immobilization. The performance characteristics in FBR were evaluated. Effectiveness factor (η) for FBR is greater than unity demonstrating that activity of enzyme is more than that of the free enzyme. The Michaelis constant (Km) for covalently bound glucoamylase was lower than that for free enzyme, i.e., the affinity for substrate improves upon immobilization. This shows that diffusional effects are completely eliminated in the FBR. Both immobilized systems showed almost 100% initial activity after 96 h of continuous operation. Covalent binding demonstrated better operational stability.

Design and synthesis of efficient mac architectures for high speed decimal processor

Most of the commercial and financial data are stored in decimal fonn. Recently, support for decimal arithmetic has received increased attention due to the growing importance in financial analysis, banking, tax calculation, currency conversion, insurance, telephone billing and accounting. Performing decimal arithmetic with systems that do not support decimal computations may give a result with representation error, conversion error, and/or rounding error. In this world of precision, such errors are no more tolerable. The errors can be eliminated and better accuracy can be achieved if decimal computations are done using Decimal Floating Point (DFP) units. But the floating-point arithmetic units in today's general-purpose microprocessors are based on the binary number system, and the decimal computations are done using binary arithmetic. Only few common decimal numbers can be exactly represented in Binary Floating Point (BF P). ln many; cases, the law requires that results generated from financial calculations performed on a computer should exactly match with manual calculations. Currently many applications involving fractional decimal data perform decimal computations either in software or with a combination of software and hardware. The performance can be dramatically improved by complete hardware DFP units and this leads to the design of processors that include DF P hardware.VLSI implementations using same modular building blocks can decrease system design and manufacturing cost. A multiplexer realization is a natural choice from the viewpoint of cost and speed.This thesis focuses on the design and synthesis of efficient decimal MAC (Multiply ACeumulate) architecture for high speed decimal processors based on IEEE Standard for Floating-point Arithmetic (IEEE 754-2008). The research goal is to design and synthesize deeimal'MAC architectures to achieve higher performance.Efficient design methods and architectures are developed for a high performance DFP MAC unit as part of this research.

Fixed Point Decimal Multiplication Using RPS Algorithm

Decimal multiplication is an integral part of financial, commercial, and internet-based computations. A novel design for single digit decimal multiplication that reduces the critical path delay and area for an iterative multiplier is proposed in this research. The partial products are generated using single digit multipliers, and are accumulated based on a novel RPS algorithm. This design uses n single digit multipliers for an n × n multiplication. The latency for the multiplication of two n-digit Binary Coded Decimal (BCD) operands is (n + 1) cycles and a new multiplication can begin every n cycle. The accumulation of final partial products and the first iteration of partial product generation for next set of inputs are done simultaneously. This iterative decimal multiplier offers low latency and high throughput, and can be extended for decimal floating-point multiplication.

Speech Recognition of Malayalam Numbers

Digit speech recognition is important in many applications such as automatic data entry, PIN entry, voice dialing telephone, automated banking system, etc. This paper presents speaker independent speech recognition system for Malayalam digits. The system employs Mel frequency cepstrum coefficient (MFCC) as feature for signal processing and Hidden Markov model (HMM) for recognition. The system is trained with 21 male and female voices in the age group of 20 to 40 years and there was 98.5% word recognition accuracy (94.8% sentence recognition accuracy) on a test set of continuous digit recognition task.

On The Center Sets and Center Numbers of Some Graph Classes

For a set S of vertices and the vertex v in a connected graph G, max x2S d(x, v) is called the S-eccentricity of v in G. The set of vertices with minimum S-eccentricity is called the S-center of G. Any set A of vertices of G such that A is an S-center for some set S of vertices of G is called a center set. We identify the center sets of certain classes of graphs namely, Block graphs, Km,n, Kn −e, wheel graphs, odd cycles and symmetric even graphs and enumerate them for many of these graph classes. We also introduce the concept of center number which is defined as the number of distinct center sets of a graph and determine the center number of some graph classes