Unusual bismuth-containing surface layers of III-V compound semiconductors

The understanding and engineering of bismuth (Bi) containing semiconductor surfaces are signi cant in the development of novel semiconductor materials for electronic and optoelectronic devices such as high-e ciency solar cells, lasers and light emitting diodes. For example, a Bi surface layer can be used as a surfactant which oats on a III-V compound-semiconductor surface during the epitaxial growth of IIIV lms. This Bi surfactant layer improves the lm-growth conditions if compared to the growth without the Bi layer. Therefore, detailed knowledge of the properties of the Bi/III-V surfaces is needed. In this thesis, well-de ned surface layers containing Bi have been produced on various III-V semiconductor substrates. The properties of these Bi-induced surfaces have been measured by low-energy electron di raction (LEED), scanning-tunneling microscopy and spectroscopy (STM), and synchrotron-radiation photoelectron spectroscopy. The experimental results have been compared with theoretically calculated results to resolve the atomic structures of the studied surfaces. The main ndings of this research concern the determination of the properties of an unusual Bi-containing (2×1) surface structure, the discovery and characterization of a uniform pattern of Bi nanolines, and the optimization of the preparation conditions for this Bi-nanoline pattern.

Research and development of III-V semiconductor surfaces for improved device interfaces

This thesis is devoted to understanding and improving technologically important III-V compound semiconductor (e.g. GaAs, InAs, and InSb) surfaces and interfaces for devices. The surfaces and interfaces of crystalline III-V materials have a crucial role in the operation of field-effect-transistors (FET) and highefficiency solar-cells, for instance. However, the surfaces are also the most defective part of the semiconductor material and it is essential to decrease the amount of harmful surface or interface defects for the next-generation III-V semiconductor device applications. Any improvement in the crystal ordering at the semiconductor surface reduces the amount of defects and increases the material homogeneity. This is becoming more and more important when the semiconductor device structures decrease to atomic-scale dimensions. Toward that target, the effects of different adsorbates (i.e., Sn, In, and O) on the III-V surface structures and properties have been investigated in this work. Furthermore, novel thin-films have been synthesized, which show beneficial properties regarding the passivation of the reactive III-V surfaces. The work comprises ultra-high-vacuum (UHV) environment for the controlled fabrication of atomically ordered III-V(100) surfaces. The surface sensitive experimental methods [low energy electron diffraction (LEED), scanning tunneling microscopy/spectroscopy (STM/STS), and synchrotron radiation photoelectron spectroscopy (SRPES)] and computational density-functionaltheory (DFT) calculations are utilized for elucidating the atomic and electronic properties of the crucial III-V surfaces. The basic research results are also transferred to actual device tests by fabricating metal-oxide-semiconductor capacitors and utilizing the interface sensitive measurement techniques [capacitance voltage (CV) profiling, and photoluminescence (PL) spectroscopy] for the characterization. This part of the thesis includes the instrumentation of home-made UHV-compatible atomic-layer-deposition (ALD) reactor for growing good quality insulator layers. The results of this thesis elucidate the atomic structures of technologically promising Sn- and In-stabilized III-V compound semiconductor surfaces. It is shown that the Sn adsorbate induces an atomic structure with (1×2)/(1×4) surface symmetry which is characterized by Sn-group III dimers. Furthermore, the stability of peculiar ζa structure is demonstrated for the GaAs(100)-In surface. The beneficial effects of these surface structures regarding the crucial III-V oxide interface are demonstrated. Namely, it is found that it is possible to passivate the III-V surface by a careful atomic-scale engineering of the III-V surface prior to the gate-dielectric deposition. The thin (1×2)/(1×4)-Sn layer is found to catalyze the removal of harmful amorphous III-V oxides. Also, novel crystalline III-V-oxide structures are synthesized and it is shown that these structures improve the device characteristics. The finding of crystalline oxide structures is exploited by solving the atomic structure of InSb(100)(1×2) and elucidating the electronic structure of oxidized InSb(100) for the first time.

Resonant tunneling effects in semiconductor heterostructures

The thesis is devoted to a theoretical study of resonant tunneling phenomena in semiconductor heterostructures and nanostructures. It considers several problems relevant to modern solid state physics. Namely these are tunneling between 2D electron layers with spin-orbit interaction, tunnel injection into molecular solid material, resonant tunnel coupling of a bound state with continuum and resonant indirect exchange interaction mediated by a remote conducting channel. A manifestation of spin-orbit interaction in the tunneling between two 2D electron layers is considered. General expression is obtained for the tunneling current with account of Rashba and Dresselhaus types of spin-orbit interaction and elastic scattering. It is demonstrated that the tunneling conductance is very sensitive to relation between Rashba and Dresselhaus contributions and opens possibility to determine the spin-orbit interaction parameters and electron quantum lifetime in direct tunneling experiments with no external magnetic field applied. A microscopic mechanism of hole injection from metallic electrode into organic molecular solid (OMS) in high electric field is proposed for the case when the molecules ionization energy exceeds work function of the metal. It is shown that the main contribution to the injection current comes from direct isoenergetic transitions from localized states in OMS to empty states in the metal. Strong dependence of the injection current on applied voltage originates from variation of the number of empty states available in the metal rather than from distortion of the interface barrier. A theory of tunnel coupling between an impurity bound state and the 2D delocalized states in the quantum well (QW) is developed. The problem is formulated in terms of Anderson-Fano model as configuration interaction between the carrier bound state at the impurity and the continuum of delocalized states in the QW. An effect of this interaction on the interband optical transitions in the QW is analyzed. The results are discussed regarding the series of experiments on the GaAs structures with a -Mn layer. A new mechanism of ferromagnetism in diluted magnetic semiconductor heterosructures is considered, namely the resonant enhancement of indirect exchange interaction between paramagnetic centers via a spatially separated conducting channel. The underlying physical model is similar to the Ruderman-Kittel-Kasuya-Yosida (RKKY) interaction; however, an important difference relevant to the low-dimensional structures is a resonant hybridization of a bound state at the paramagnetic ion with the continuum of delocalized states in the conducting channel. An approach is developed, which unlike RKKY is not based on the perturbation theory and demonstrates that the resonant hybridization leads to a strong enhancement of the indirect exchange. This finding is discussed in the context of the known experimental data supporting the phenomenon.

Spectroscopic Studies of III-V Semiconductor Materials for Improved Devices

Defects in semiconductor crystals and at their interfaces usually impair the properties and the performance of devices. These defects include, for example, vacancies (i.e., missing crystal atoms), interstitials (i.e., extra atoms between the host crystal sites), and impurities such as oxygen atoms. The defects can decrease (i) the rate of the radiative electron transition from the conduction band to the valence band, (ii) the amount of charge carriers, and (iii) the mobility of the electrons in the conduction band. It is a common situation that the presence of crystal defects can be readily concluded as a decrease in the luminescence intensity or in the current flow for example. However, the identification of the harmful defects is not straightforward at all because it is challenging to characterize local defects with atomic resolution and identification. Such atomic-scale knowledge is however essential to find methods for reducing the amount of defects in energy-efficient semiconductor devices. The defects formed in thin interface layers of semiconductors are particularly difficult to characterize due to their buried and amorphous structures. Characterization methods which are sensitive to defects often require well-defined samples with long range order. Photoelectron spectroscopy (PES) combined with photoluminescence (PL) or electrical measurements is a potential approach to elucidate the structure and defects of the interface. It is essential to combine the PES with complementary measurements of similar samples to relate the PES changes to changes in the interface defect density. Understanding of the nature of defects related to III-V materials is relevant to developing for example field-effect transistors which include a III-V channel, but research is still far from complete. In this thesis, PES measurements are utilized in studies of various III-V compound semiconductor materials. PES is combined with photoluminescence measurements to study the SiO2/GaAs, SiNx/GaAs and BaO/GaAs interfaces. Also the formation of novel materials InN and photoluminescent GaAs nanoparticles are studied. Finally, the formation of Ga interstitial defects in GaAsN is elucidated by combining calculational results with PES measurements.

Simulation of Boundary Layers and Heat Transfer in the Entrance Region of Pipes

The study of fluid flow in pipes is one of the main topic of interest for engineers in industries. In this thesis, an effort is made to study the boundary layers formed near the wall of the pipe and how it behaves as a resistance to heat transfer. Before few decades, the scientists used to derive the analytical and empirical results by hand as there were limited means available to solve the complex fluid flow phenomena. Due to the increase in technology, now it has been practically possible to understand and analyze the actual fluid flow in any type of geometry. Several methodologies have been used in the past to analyze the boundary layer equations and to derive the expression for heat transfer. An integral relation approach is used for the analytical solution of the boundary layer equations and is compared with the FLUENT simulations for the laminar case. Law of the wall approach is used to derive the empirical correlation between dimensionless numbers and is then compared with the results from FLUENT for the turbulent case. In this thesis, different approaches like analytical, empirical and numerical are compared for the same set of fluid flow equations.

MOCVD growth andproperties of GaN and AlGaN layers

In this work GaN and AlGaN layers were grown by metal-organic chemical vapor deposition (MOCVD) on sapphire substrates. The research was carried out at Micro and Nanoscience Laboratory of Helsinki University of Technology. The objective of this thesis is the study of MOCVD technique for the growth of GaN and AlGaN films and optimization of growth parameters in purpose to improve crystal quality of the films. The widely used two-step and the new multistep methods have been used for GaN, AlGaN MOCVD growth on c-plane sapphire. Properties of the GaN and AlGaN layers were studied using in-situ reflectance monitoring during MOCVD growth, atomic force microscopy and x-ray diffraction. Compared to the two step method, the multistep method has produced even better qualities of the GaN and AlGaN layers and significant reduction of threading dislocation density.

Microwave Slot Transmission Line Filled with Ferroelectric and Ferromagnetic Layers

Now when the technology is fast developing it is very important to investigate new hybrid structures. One way is to use ferrite ferroelectric layered structures. Theoretical and experimental investigation of such structures was made. These structures have advantages of both layers and it is possible to tune the behavior of this structure by external electric and magnetic field. But these structures have some disadvantages connected with presence of thick ferroelectric layer. One way to overcome this problem is to use slotline. So this is another new way to create hybrid ferrite ferroelectric structures, but it is needed to create new theory and find experimental proof that the behavior of these structures can be tuned with external magnetic and electric fields.

Thermal modelling of semiconductor switches in three-level Neutral Point Clamped Medium Voltage DTC-inverter

The aim of this thesis is to investigate the thermal loading of medium voltage three-level NPC inverter’s semiconductor IGCT switches in different operation points. The objective is to reach both a fairly accurate off-line simulation program and also so simple a simulation model that its implementation into an embedded system could be reasonable in practice and a real time use should become feasible. Active loading limitation of the inverter can be realized with a thermal model which is practical in a real time use. Determining of the component heating has been divided into two parts; defining of component losses and establishing the structure of a thermal network. Basics of both parts are clarified. The simulation environment is Matlab-Simulink. Two different models are constructed – a more accurate one and a simplified one. Potential simplifications are clarified with the help of the first one. Simplifications are included in the latter model and the functionalities of both models are compared. When increasing the calculation time step a decreased number of considered components and time constants of the thermal network can be used in the simplified model. Heating of a switching component is dependent on its topological position and inverter’s operation point. The output frequency of the converter defines mainly which one of the switching components is – because of its losses and heating – the performance limiting component of the converter. Comparison of results given by different thermal models demonstrates that with larger time steps, describing of fast occurring switching losses becomes difficult. Generally articles and papers dealing with this subject are written for two-level inverters. Also inverters which apply direct torque control (DTC) are investigated rarely from the heating point of view. Hence, this thesis completes the former material.

Power cycling lifetime estimation of IGBT power modules based on chip temperature modeling

In this doctoral thesis, methods to estimate the expected power cycling life of power semiconductor modules based on chip temperature modeling are developed. Frequency converters operate under dynamic loads in most electric drives. The varying loads cause thermal expansion and contraction, which stresses the internal boundaries between the material layers in the power module. Eventually, the stress wears out the semiconductor modules. The wear-out cannot be detected by traditional temperature or current measurements inside the frequency converter. Therefore, it is important to develop a method to predict the end of the converter lifetime. The thesis concentrates on power-cycling-related failures of insulated gate bipolar transistors. Two types of power modules are discussed: a direct bonded copper (DBC) sandwich structure with and without a baseplate. Most common failure mechanisms are reviewed, and methods to improve the power cycling lifetime of the power modules are presented. Power cycling curves are determined for a module with a lead-free solder by accelerated power cycling tests. A lifetime model is selected and the parameters are updated based on the power cycling test results. According to the measurements, the factor of improvement in the power cycling lifetime of modern IGBT power modules is greater than 10 during the last decade. Also, it is noticed that a 10 C increase in the chip temperature cycle amplitude decreases the lifetime by 40%. A thermal model for the chip temperature estimation is developed. The model is based on power loss estimation of the chip from the output current of the frequency converter. The model is verified with a purpose-built test equipment, which allows simultaneous measurement and simulation of the chip temperature with an arbitrary load waveform. The measurement system is shown to be convenient for studying the thermal behavior of the chip. It is found that the thermal model has a 5 C accuracy in the temperature estimation. The temperature cycles that the power semiconductor chip has experienced are counted by the rainflow algorithm. The counted cycles are compared with the experimentally verified power cycling curves to estimate the life consumption based on the mission profile of the drive. The methods are validated by the lifetime estimation of a power module in a direct-driven wind turbine. The estimated lifetime of the IGBT power module in a direct-driven wind turbine is 15 000 years, if the turbine is located in south-eastern Finland.

Transient current technique simulation of semiconductor detectors

Nowadays advanced simulation technologies of semiconductor devices occupies an important place in microelectronics production process. Simulation helps to understand devices internal processes physics, detect new effects and find directions for optimization. Computer calculation reduces manufacturing costs and time. Modern simulation suits such as Silcaco TCAD allow simulating not only individual semiconductor structures, but also these structures in the circuit. For that purpose TCAD include MixedMode tool. That tool can simulate circuits using compact circuit models including semiconductor structures with their physical models. In this work, MixedMode is used for simulating transient current technique setup, which include detector and supporting electrical circuit. This technique was developed by RD39 collaboration project for investigation radiation detectors radiation hard properties.

Power semiconductor nonlinearities in active du/dt output filtering

This doctoral thesis introduces an improved control principle for active du/dt output filtering in variable-speed AC drives, together with performance comparisons with previous filtering methods. The effects of power semiconductor nonlinearities on the output filtering performance are investigated. The nonlinearities include the timing deviation and the voltage pulse waveform distortion in the variable-speed AC drive output bridge. Active du/dt output filtering (ADUDT) is a method to mitigate motor overvoltages in variable-speed AC drives with long motor cables. It is a quite recent addition to the du/dt reduction methods available. This thesis improves on the existing control method for the filter, and concentrates on the lowvoltage (below 1 kV AC) two-level voltage-source inverter implementation of the method. The ADUDT uses narrow voltage pulses having a duration in the order of a microsecond from an IGBT (insulated gate bipolar transistor) inverter to control the output voltage of a tuned LC filter circuit. The filter output voltage has thus increased slope transition times at the rising and falling edges, with an opportunity of no overshoot. The effect of the longer slope transition times is a reduction in the du/dt of the voltage fed to the motor cable. Lower du/dt values result in a reduction in the overvoltage effects on the motor terminals. Compared with traditional output filtering methods to accomplish this task, the active du/dt filtering provides lower inductance values and a smaller physical size of the filter itself. The filter circuit weight can also be reduced. However, the power semiconductor nonlinearities skew the filter control pulse pattern, resulting in control deviation. This deviation introduces unwanted overshoot and resonance in the filter. The controlmethod proposed in this thesis is able to directly compensate for the dead time-induced zero-current clamping (ZCC) effect in the pulse pattern. It gives more flexibility to the pattern structure, which could help in the timing deviation compensation design. Previous studies have shown that when a motor load current flows in the filter circuit and the inverter, the phase leg blanking times distort the voltage pulse sequence fed to the filter input. These blanking times are caused by excessively large dead time values between the IGBT control pulses. Moreover, the various switching timing distortions, present in realworld electronics when operating with a microsecond timescale, bring additional skew to the control. Left uncompensated, this results in distortion of the filter input voltage and a filter self-induced overvoltage in the form of an overshoot. This overshoot adds to the voltage appearing at the motor terminals, thus increasing the transient voltage amplitude at the motor. This doctoral thesis investigates the magnitude of such timing deviation effects. If the motor load current is left uncompensated in the control, the filter output voltage can overshoot up to double the input voltage amplitude. IGBT nonlinearities were observed to cause a smaller overshoot, in the order of 30%. This thesis introduces an improved ADUDT control method that is able to compensate for phase leg blanking times, giving flexibility to the pulse pattern structure and dead times. The control method is still sensitive to timing deviations, and their effect is investigated. A simple approach of using a fixed delay compensation value was tried in the test setup measurements. The ADUDT method with the new control algorithm was found to work in an actual motor drive application. Judging by the simulation results, with the delay compensation, the method should ultimately enable an output voltage performance and a du/dt reduction that are free from residual overshoot effects. The proposed control algorithm is not strictly required for successful ADUDT operation: It is possible to precalculate the pulse patterns by iteration and then for instance store them into a look-up table inside the control electronics. Rather, the newly developed control method is a mathematical tool for solving the ADUDT control pulses. It does not contain the timing deviation compensation (from the logic-level command to the phase leg output voltage), and as such is not able to remove the timing deviation effects that cause error and overshoot in the filter. When the timing deviation compensation has to be tuned-in in the control pattern, the precalculated iteration method could prove simpler and equally good (or even better) compared with the mathematical solution with a separate timing compensation module. One of the key findings in this thesis is the conclusion that the correctness of the pulse pattern structure, in the sense of ZCC and predicted pulse timings, cannot be separated from the timing deviations. The usefulness of the correctly calculated pattern is reduced by the voltage edge timing errors. The doctoral thesis provides an introductory background chapter on variable-speed AC drives and the problem of motor overvoltages and takes a look at traditional solutions for overvoltage mitigation. Previous results related to the active du/dt filtering are discussed. The basic operation principle and design of the filter have been studied previously. The effect of load current in the filter and the basic idea of compensation have been presented in the past. However, there was no direct way of including the dead time in the control (except for solving the pulse pattern manually by iteration), and the magnitude of nonlinearity effects had not been investigated. The enhanced control principle with the dead time handling capability and a case study of the test setup timing deviations are the main contributions of this doctoral thesis. The simulation and experimental setup results show that the proposed control method can be used in an actual drive. Loss measurements and a comparison of active du/dt output filtering with traditional output filtering methods are also presented in the work. Two different ADUDT filter designs are included, with ferrite core and air core inductors. Other filters included in the tests were a passive du/dtfilter and a passive sine filter. The loss measurements incorporated a silicon carbide diode-equipped IGBT module, and the results show lower losses with these new device technologies. The new control principle was measured in a 43 A load current motor drive system and was able to bring the filter output peak voltage from 980 V (the previous control principle) down to 680 V in a 540 V average DC link voltage variable-speed drive. A 200 m motor cable was used, and the filter losses for the active du/dt methods were 111W–126 W versus 184 W for the passive du/dt. In terms of inverter and filter losses, the active du/dt filtering method had a 1.82-fold increase in losses compared with an all-passive traditional du/dt output filter. The filter mass with the active du/dt method was 17% (2.4 kg, air-core inductors) compared with 14 kg of the passive du/dt method filter. Silicon carbide freewheeling diodes were found to reduce the inverter losses in the active du/dt filtering by 18% compared with the same IGBT module with silicon diodes. For a 200 m cable length, the average peak voltage at the motor terminals was 1050 V with no filter, 960 V for the all-passive du/dt filter, and 700 V for the active du/dt filtering applying the new control principle.

Piezo force microscopy and peakforce tuna measurements of III-V semiconductor nanowires

GaN, InP and GaAs nanowires were investigated for piezoelectric response. Nanowires and structures based on them can find wide applications in areas purposes such as nanogenarators, nanodrives, Solar cells and other perspective areas. Experemental measurements were carried out on AFM Bruker multimode 8 and data was handled with Nanoscope software. AFM techniques permitted not only to visualize the surface topography, but also to show distribution of piezoresponse and allowed to calculate its properties. The calculated values are in the same range as published by other authors.