The Design of a Software Lifecycle Management Framework to a Configuration Management System

Keeping track of software assets and managing software installations in IT environments can be a hard endeavor, especially when the size and diversity of the environment grows. How to install and uninstall software efficiently and cost effectively? Are there too few or too many software licenses purchased? If installed, is the software actually in use? Software Asset Management (SAM) is a process that involves managing and optimizing the purchase, deployment, maintenance, utilization, and disposal of software applications within an organization. This master’s thesis describes a special Software Lifecycle Management Framework to provide solutions to the multitude of challenges within SAM. The main objectives when designing the framework was to provide a set of tools to control the software assets during their entire lifecycle while trying to minimize the costs related to owning and managing them.

Modeling and Analysis of Noise and Interconnects for On-Chip Communication Link Design

This thesis considers modeling and analysis of noise and interconnects in onchip communication. Besides transistor count and speed, the capabilities of a modern design are often limited by on-chip communication links. These links typically consist of multiple interconnects that run parallel to each other for long distances between functional or memory blocks. Due to the scaling of technology, the interconnects have considerable electrical parasitics that affect their performance, power dissipation and signal integrity. Furthermore, because of electromagnetic coupling, the interconnects in the link need to be considered as an interacting group instead of as isolated signal paths. There is a need for accurate and computationally effective models in the early stages of the chip design process to assess or optimize issues affecting these interconnects. For this purpose, a set of analytical models is developed for on-chip data links in this thesis. First, a model is proposed for modeling crosstalk and intersymbol interference. The model takes into account the effects of inductance, initial states and bit sequences. Intersymbol interference is shown to affect crosstalk voltage and propagation delay depending on bus throughput and the amount of inductance. Next, a model is proposed for the switching current of a coupled bus. The model is combined with an existing model to evaluate power supply noise. The model is then applied to reduce both functional crosstalk and power supply noise caused by a bus as a trade-off with time. The proposed reduction method is shown to be effective in reducing long-range crosstalk noise. The effects of process variation on encoded signaling are then modeled. In encoded signaling, the input signals to a bus are encoded using additional signaling circuitry. The proposed model includes variation in both the signaling circuitry and in the wires to calculate the total delay variation of a bus. The model is applied to study level-encoded dual-rail and 1-of-4 signaling. In addition to regular voltage-mode and encoded voltage-mode signaling, current-mode signaling is a promising technique for global communication. A model for energy dissipation in RLC current-mode signaling is proposed in the thesis. The energy is derived separately for the driver, wire and receiver termination.

Case study in responsive (re)design

Presentation at Open Repositories 2014, Helsinki, Finland, June 9-13, 2014

The Design of Forest Taxation: A Synthesis with New Directions

Summary

Lomborg, Vanhanen ja Intelligent Design - kommentti Matti Kamppiselle

Kommentti Matti Kamppisen kirjoitukseen TT -lehdessä 1/2005