Array-CGH in patients with a clinical diagnosis of Kabuki syndrome: identification of two cases with terminal 2q37 deletion and no other recurrent rearrangement

Background: Kabuki syndrome (KS) is a multiple congenital anomaly syndrome characterized by specific facial features, mild to moderate mental retardation, postnatal growth delay, skeletal abnormalities, and unusual dermatoglyphic patterns with prominent fingertip pads. A 3.5 Mb duplication at 8p23.1-p22 was once reported as a specific alteration in KS but has not been confirmed in other patients. The molecular basis of KS remains unknown. Methods: We have studied 16 Spanish patients with a clinical diagnosis of KS or KS-like to search for genomic imbalances using genome-wide array technologies. All putative rearrangements were confirmed by FISH, microsatellite markers and/or MLPA assays, which also determined whether the imbalance was de novo or inherited. Results: No duplication at 8p23.1-p22 was observed in our patients. We detected complex rearrangements involving 2q in two patients with Kabuki-like features: 1) a de novo inverted duplication of 11 Mb with a 4.5 Mb terminal deletion, and 2) a de novo 7.2 Mb-terminal deletion in a patient with an additional de novo 0.5 Mb interstitial deletion in 16p. Additional copy number variations (CNV), either inherited or reported in normal controls, were identified and interpreted as polymorphic variants. No specific CNV was significantly increased in the KS group. Conclusion: Our results further confirmed that genomic duplications of 8p23 region are not a common cause of KS and failed to detect other recurrent rearrangement causing this disorder. The detection of two patients with 2q37 deletions suggests that there is a phenotypic overlap between the two conditions, and screening this region in the Kabuki-like patients should be considered.

Performance evaluation of MPEG-4 Video encoder on Adres

Actualment un típic embedded system (ex. telèfon mòbil) requereix alta qualitat per portar a terme tasques com codificar/descodificar a temps real; han de consumir poc energia per funcionar hores o dies utilitzant bateries lleugeres; han de ser el suficientment flexibles per integrar múltiples aplicacions i estàndards en un sol aparell; han de ser dissenyats i verificats en un període de temps curt tot i l’augment de la complexitat. Els dissenyadors lluiten contra aquestes adversitats, que demanen noves innovacions en arquitectures i metodologies de disseny. Coarse-grained reconfigurable architectures (CGRAs) estan emergent com a candidats potencials per superar totes aquestes dificultats. Diferents tipus d’arquitectures han estat presentades en els últims anys. L’alta granularitat redueix molt el retard, l’àrea, el consum i el temps de configuració comparant amb les FPGAs. D’altra banda, en comparació amb els tradicionals processadors coarse-grained programables, els alts recursos computacionals els permet d’assolir un alt nivell de paral•lelisme i eficiència. No obstant, els CGRAs existents no estant sent aplicats principalment per les grans dificultats en la programació per arquitectures complexes. ADRES és una nova CGRA dissenyada per I’Interuniversity Micro-Electronics Center (IMEC). Combina un processador very-long instruction word (VLIW) i un coarse-grained array per tenir dues opcions diferents en un mateix dispositiu físic. Entre els seus avantatges destaquen l’alta qualitat, poca redundància en les comunicacions i la facilitat de programació. Finalment ADRES és un patró enlloc d’una arquitectura concreta. Amb l’ajuda del compilador DRESC (Dynamically Reconfigurable Embedded System Compile), és possible trobar millors arquitectures o arquitectures específiques segons l’aplicació. Aquest treball presenta la implementació d’un codificador MPEG-4 per l’ADRES. Mostra l’evolució del codi per obtenir una bona implementació per una arquitectura donada. També es presenten les característiques principals d’ADRES i el seu compilador (DRESC). Els objectius són de reduir al màxim el nombre de cicles (temps) per implementar el codificador de MPEG-4 i veure les diferents dificultats de treballar en l’entorn ADRES. Els resultats mostren que els cícles es redueixen en un 67% comparant el codi inicial i final en el mode VLIW i un 84% comparant el codi inicial en VLIW i el final en mode CGA.

Escacs, un sistema intel·ligent

Des dels inicis dels ordinadors com a màquines programables, l’home ha intentat dotar-los de certa intel•ligència per tal de pensar o raonar el més semblant possible als humans. Un d’aquests intents ha sigut fer que la màquina sigui capaç de pensar de tal manera que estudiï jugades i guanyi partides d’escacs. En l’actualitat amb els actuals sistemes multi tasca, orientat a objectes i accés a memòria i gràcies al potent hardware del que disposem, comptem amb una gran varietat de programes que es dediquen a jugar a escacs. Però no hi ha només programes petits, hi ha fins i tot màquines senceres dedicades a calcular i estudiar jugades per tal de guanyar als millors jugadors del món. L’objectiu del meu treball és dur a terme un estudi i implementació d’un d’aquests programes, per això es divideix en dues parts. La part teòrica o de l’estudi, consta d’un estudi dels sistemes d’intel•ligència artificial que es dediquen a jugar a escacs, estudi i cerca d’una funció d’avaluació vàlida i estudi dels algorismes de cerca. La part pràctica del treball es basa en la implementació d’un sistema intel•ligent capaç de jugar a escacs amb certa lògica. Aquesta implementació es porta a terme amb l’ajuda de les llibreries SDL, utilitzant l’algorisme minimax amb poda alfa-beta i codi c++. Com a conclusió del projecte m’agradaria remarcar que l’estudi realitzat m’ha deixat veure que crear un joc d’escacs no era tan fàcil com jo pensava però m’ha aportat la satisfacció d’aplicar tot el que he après durant la carrera i de descobrir moltes altres coses noves.

Eficiència energètica aplicada a les instal·lacions de la Universitat de Vic

En termes generals, es pot definir l’Eficiència Energètica com la reducció del consum d’energia mantenint els mateixos serveis energètics, sense disminuir el nostre confort i qualitat de vida, protegint el medi ambient, assegurant el proveïment i fomentant un comportament Sostenible al seu ús. L’objectiu principal d’aquest treball, és reduir el consum d’energia i terme de potència contractat a la Universitat de Vic, aplicant un programa d’estalvi amb mesures correctores en el funcionament de les seves instal·lacions o espais. Per tal de poder arribar a aquest objectiu marcat, prèviament s’ha realitzat un estudi acurat, obtenint tota la informació necessària per poder aplicar les mesures correctores a la bossa més important de consum. Un cop trobada, dur a terme l’estudi de la viabilitat de la inversió de les mesures correctores més eficients, optimitzant els recursos destinats. L’espai on s’ha dut a terme l’estudi, ha estat a l’edifici F del Campus Miramarges, seguint les indicacions d’Arnau Bardolet (Cap de Manteniment de la UVIC). Aquest edifici consta d’un entresol, baixos i quatre plantes. L’equip de mesura que s’ha fet servir per realitzar l’estudi, és de la marca Circutor sèrie AR5-L, aquests equips són programables que mesuren, calculen i emmagatzemen en memòria els principals paràmetres elèctrics en xarxes trifàsiques. Els projectes futurs complementaris que es podrien realitzar a part d’aquest són: instal·lar sensors, instal·lar mòduls convertidors TCP/IP, aprofitar la xarxa intranet i crear un escada amb un sinòptic de control i gestió des d’un punt de treball. Aquest aplicatiu permet visualitzar en una pantalla d’un PC tots els estats dels elements controlats mitjançant un sinòptic (encendre/parar manualment l’enllumenat i endolls de les aules, estat d’enllumenat i endolls de les aules, consums instantanis/acumulats energètics, estat dels passadissos entre altres) i explotar les dades recollides a la base de dades. Cada espai tindria la seva lògica de funcionament automàtic específic. Entre les conclusions més rellevants obtingudes en aquest treball s’observa: · Que és pot reduir la potència contractada a la factura a l’estar per sota de la realment consumida. · Que no hi ha penalitzacions a la factura per consum de reactiva, ja que el compensador funciona correctament. · Que es pot reduir l’horari de l’inici del consum d’energia, ja que no correspon a l’activitat docent. · Els valors de la tensió i freqüència estan dintre de la normalitat. · Els harmònics estan al llindar màxim. Analitzant aquestes conclusions, voldria destacar les mesures correctores més importants que es poden dur a terme: canvi tecnològic a LED, temporitzar automàticament l’encesa i apagada dels fluorescents i equips informàtics de les aules “seguint calendari docent”, instal·lar sensors de moviment amb detecció lumínica als passadissos. Totes les conclusions extretes d’aquest treball, es poden aplicar a tots els edificis de la facultat, prèviament realitzant l’estudi individual de cadascuna, seguint els mateixos criteris per tal d’optimitzar la inversió.

A gated single-photon avalanche diode array fabricated in a conventional CMOS process for triggered systems

A bidimensional array based on single-photon avalanche diodes for triggered imaging systems is presented. The diodes are operated in the gated mode of acquisition to reduce the probability to detect noise counts interfering with photon arrival events. In addition, low reverse bias overvoltages are used to lessen the dark count rate. Experimental results demonstrate that the prototype fabricated with a standard HV-CMOS process gets rid of afterpulses and offers a reduced dark count probability by applying the proposed modes of operation. The detector exhibits a dynamic range of 15 bits with short gated"on" periods of 10ns and a reverse bias overvoltage of 1.0V.

Gas identification with tin oxide sensor array and self-organizing maps: adaptive correction of sensor drifts

Low-cost tin oxide gas sensors are inherently nonspecific. In addition, they have several undesirable characteristics such as slow response, nonlinearities, and long-term drifts. This paper shows that the combination of a gas-sensor array together with self-organizing maps (SOM's) permit success in gas classification problems. The system is able to determine the gas present in an atmosphere with error rates lower than 3%. Correction of the sensor's drift with an adaptive SOM has also been investigated

Drift compensation of gas sensor array data by Orthogonal Signal Correction

Drift is an important issue that impairs the reliability of gas sensing systems. Sensor aging, memory effects and environmental disturbances produce shifts in sensor responses that make initial statistical models for gas or odor recognition useless after a relatively short period (typically few weeks). Frequent recalibrations are needed to preserve system accuracy. However, when recalibrations involve numerous samples they become expensive and laborious. An interesting and lower cost alternative is drift counteraction by signal processing techniques. Orthogonal Signal Correction (OSC) is proposed for drift compensation in chemical sensor arrays. The performance of OSC is also compared with Component Correction (CC). A simple classification algorithm has been employed for assessing the performance of the algorithms on a dataset composed by measurements of three analytes using an array of seventeen conductive polymer gas sensors over a ten month period.

Drift compensation of gas sensor array data by common principal component analysis

A new drift compensation method based on Common Principal Component Analysis (CPCA) is proposed. The drift variance in data is found as the principal components computed by CPCA. This method finds components that are common for all gasses in feature space. The method is compared in classification task with respect to the other approaches published where the drift direction is estimated through a Principal Component Analysis (PCA) of a reference gas. The proposed new method ¿ employing no specific reference gas, but information from all gases ¿has shown the same performance as the traditional approach with the best-fitted reference gas. Results are shown with data lasting 7-months including three gases at different concentrations for an array of 17 polymeric sensors.

Threading dislocation lines in two-sided flux-array decorations

Two-sided flux decoration experiments indicate that threading dislocation lines (TDLs), which cross the entire film, are sometimes trapped in metastable states. We calculate the elastic energy associated with the meanderings of a TDL. The TDL behaves as an anisotropic and dispersive string with thermal fluctuations largely along its Burgers vector. These fluctuations also modify the structure factor of the vortex solid. Both effects can, in principle, be used to estimate the elastic moduli of the material.

Multiway Array Decomposition Analysis of EEGs in Alzheimer’s Disease

Methods for the extraction of features from physiological datasets are growing needs as clinical investigations of Alzheimer’s disease (AD) in large and heterogeneous population increase. General tools allowing diagnostic regardless of recording sites, such as different hospitals, are essential and if combined to inexpensive non-invasive methods could critically improve mass screening of subjects with AD. In this study, we applied three state of the art multiway array decomposition (MAD) methods to extract features from electroencephalograms (EEGs) of AD patients obtained from multiple sites. In comparison to MAD, spectral-spatial average filter (SSFs) of control and AD subjects were used as well as a common blind source separation method, algorithm for multiple unknown signal extraction (AMUSE). We trained a feed-forward multilayer perceptron (MLP) to validate and optimize AD classification from two independent databases. Using a third EEG dataset, we demonstrated that features extracted from MAD outperformed features obtained from SSFs AMUSE in terms of root mean squared error (RMSE) and reaching up to 100% of accuracy in test condition. We propose that MAD maybe a useful tool to extract features for AD diagnosis offering great generalization across multi-site databases and opening doors to the discovery of new characterization of the disease.

A Classification of Tools for Learning Logic

A table showing a comparison and classification of tools (intelligent tutoring systems) for e-learning of Logic at a college level.

Power supply noise and logic error probability

Voltage fluctuations caused by parasitic impedances in the power supply rails of modern ICs are a major concern in nowadays ICs. The voltage fluctuations are spread out to the diverse nodes of the internal sections causing two effects: a degradation of performances mainly impacting gate delays anda noisy contamination of the quiescent levels of the logic that drives the node. Both effects are presented together, in thispaper, showing than both are a cause of errors in modern and future digital circuits. The paper groups both error mechanismsand shows how the global error rate is related with the voltage deviation and the period of the clock of the digital system.

Via-configurable transistor array: a regular design technique to improve ICs yield

Process variations are a major bottleneck for digital CMOS integrated circuits manufacturability and yield. That iswhy regular techniques with different degrees of regularity are emerging as possible solutions. Our proposal is a new regular layout design technique called Via-Configurable Transistors Array (VCTA) that pushes to the limit circuit layout regularity for devices and interconnects in order to maximize regularity benefits. VCTA is predicted to perform worse than the Standard Cell approach designs for a certain technology node but it will allow the use of a future technology on an earlier time. Ourobjective is to optimize VCTA for it to be comparable to the Standard Cell design in an older technology. Simulations for the first unoptimized version of our VCTA of delay and energy consumption for a Full Adder circuit in the 90 nm technology node are presented and also the extrapolation for Carry-RippleAdders from 4 bits to 64 bits.

Joint array combining and MLSE for single-user receivers in multipath Gaussian multiuser channels

The well-known structure of an array combiner along with a maximum likelihood sequence estimator (MLSE) receiveris the basis for the derivation of a space-time processor presentinggood properties in terms of co-channel and intersymbol interferencerejection. The use of spatial diversity at the receiver front-endtogether with a scalar MLSE implies a joint design of the spatialcombiner and the impulse response for the sequence detector. Thisis faced using the MMSE criterion under the constraint that thedesired user signal power is not cancelled, yielding an impulse responsefor the sequence detector that is matched to the channel andcombiner response. The procedure maximizes the signal-to-noiseratio at the input of the detector and exhibits excellent performancein realistic multipath channels.

Adding similarity-based reasoning capabilities to a Horn fragment of possibilistic logic with fuzzy constants

PLFC is a first-order possibilistic logic dealing with fuzzy constants and fuzzily restricted quantifiers. The refutation proof method in PLFC is mainly based on a generalized resolution rule which allows an implicit graded unification among fuzzy constants. However, unification for precise object constants is classical. In order to use PLFC for similarity-based reasoning, in this paper we extend a Horn-rule sublogic of PLFC with similarity-based unification of object constants. The Horn-rule sublogic of PLFC we consider deals only with disjunctive fuzzy constants and it is equipped with a simple and efficient version of PLFC proof method. At the semantic level, it is extended by equipping each sort with a fuzzy similarity relation, and at the syntactic level, by fuzzily “enlarging” each non-fuzzy object constant in the antecedent of a Horn-rule by means of a fuzzy similarity relation.