15 resultados para insulated-gate bipolar transistors (IGBTs)


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Dissertação para obtenção do Grau de Mestre em Engenharia Electrotécnica e Computadores

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IEEE Electron Device Letters, VOL. 29, NO. 9,

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This thesis reports the work performed in the optimization of deposition parameters of Multi – Walled Carbon Nanotubes (MWCNT) targeting the development of a Field Effect Transistors (FET) on paper substrates. The CNTs were dispersed in a water solution with sodium dodecyl sulphate (SDS) through ultrasonication, ultrasonic bath and a centrifugation to remove the supernatant and have a homogeneous solution. Several deposition tests were performed using different types of CNTs, dis-persants, papers substrates and deposition techniques, such as spray coating and inkjet printing. The characterization of CNTs was made by Scanning Electron Microscopy (SEM) and Hall Effect. The most suitable CNT coatings able to be used as semiconductor in FETs were deposited by spray coat-ing on a paper substrate with hydrophilic nanoporous surface (FS2) at 100 ºC, 4 bar, 10 cm height, 5 second of deposition time and 90 seconds of drying between steps (4 layers of CNTs were deposited). Planar electrolyte gated FETs were produced with these layers using gold-nickel gate, source and drain electrodes. Despite the small current modulation (Ion/Ioff ratio of 1.8) one of these devices have p-type conduction with a field effect mobility of 1.07 cm2/V.s.

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This work reports the development of field-effect transistors (FETs), whose channel is based on zinc oxide (ZnO) nanoparticles (NPs). Using screen-printing as the primary deposition technique, different inks were developed, where the semiconducting ink is based on a ZnO NPs dispersion in ethyl cellulose (EC). These inks were used to print electrolyte-gated transistors (EGTs) in a staggered-top gate structure on glass substrates, using a lithium-based polymeric electrolyte. In another approach, FETs with a staggered-bottom gate structure on paper were developed using a sol-gel method to functionalize the paper’s surface with ZnO NPs, using zinc acetate dihydrate (ZnC4H6O4·2H2O) and sodium hydroxide (NaOH) as precursors. In this case, the paper itself was used as dielectric. The various layers of the two devices were characterized using X-ray diffraction (XRD), scanning electron microscopy (SEM), Fourier Transform Infrared spectroscopy (FTIR), thermogravimetric and differential scanning calorimetric analyses (TG-DSC). Electrochemical impedance spectroscopy (EIS) was used in order to evaluate the electric double-layer (EDL) formation, in the case of the EGTs. The ZnO NPs EGTs present electrical modulation for annealing temperatures equal or superior to 300 ºC and in terms of electrical properties they showed On/Off ratios in the order of 103, saturation mobilities (μSat) of 1.49x10-1 cm2(Vs)-1 and transconductance (gm) of 10-5 S. On the other hand, the ZnO NPs FETs on paper exhibited On/Off ratios in the order of 102, μSat of 4.83x10- 3 cm2(Vs)-1and gm around 10-8 S.

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Dissertação para obtenção do Grau de Doutor em Engenharia dos Materiais, especialidade Microelectrónica e Optoelectrónica, pela Universidade Nova de Lisboa, Faculdade de Ciências e Tecnologia

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Advanced Materials, Vol. 17, nº 5

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Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para a obtenção do grau de Mestre em Engenharia Electrotécnica e de Computadores

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In partial fulfillment of the requirements for the degree of Doctor of Philosophy in Nanotechnologies and Nanosciences by Universidade Nova de Lisboa Faculdade de Ciências e Tecnologia

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Dissertação para obtenção do Grau de Doutor em Nanotecnologia e Nanociência

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Dissertação para obtenção do Grau de Mestre em Engenharia Electrotécnica e de Computadores

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Dissertação apresentada para cumprimento dos requisitos necessários à obtenção do grau de Doutor em Sociologia

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This work will discuss the use of different paper membranes as both the substrate and dielectric for field-effect memory transistors. Three different nanofibrillated cellulose membranes (NFC) were used as the dielectric layer of the memory transistors (NFC), one with no additives, one with an added polymer PAE and one with added HCl. Gallium indium zinc oxide (GIZO) was used as the device’s semiconductor and gallium aluminium zinc oxide (GAZO) was used as the gate electrode. Fourier transform infrared spectroscopy (FTIR) was used to access the water content of the paper membranes before and after vacuum. It was found that the devices recovered their water too quickly for a difference to be noticeable in FTIR. The transistor’s electrical performance tests yielded a maximum ION/IOFF ratio of around 3,52x105 and a maximum subthreshold swing of 0,804 V/decade. The retention time of the dielectric charge that grants the transistor its memory capabilities was accessed by the measurement of the drain current periodically during 144 days. During this period the mean drain current did not lower, leaving the retention time of the device indeterminate. These results were compared with similar devices revealing these devices to be at the top tier of the state-of-the-art.