87 resultados para Ubiquitous Infrastructure
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The great majority of the courses on science and technology areas where lab work is a fundamental part of the apprenticeship was not until recently available to be taught at distance. This reality is changing with the dissemination of remote laboratories. Supported by resources based on new information and communication technologies, it is now possible to remotely control a wide variety of real laboratories. However, most of them are designed specifically to this purpose, are inflexible and only on its functionality they resemble the real ones. In this paper, an alternative remote lab infrastructure devoted to the study of electronics is presented. Its main characteristics are, from a teacher's perspective, reusability and simplicity of use, and from a students' point of view, an exact replication of the real lab, enabling them to complement or finish at home the work started at class. The remote laboratory is integrated in the Learning Management System in use at the school, and therefore, may be combined with other web experiments and e-learning strategies, while safeguarding security access issues.
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Aiming for teaching/learning support in sciences and engineering areas, the Remote Experimentation concept (an E-learning subset) has grown in last years with the development of several infrastructures that enable doing practical experiments from anywhere and anytime, using a simple PC connected to the Internet. Nevertheless, given its valuable contribution to the teaching/learning process, the development of more infrastructures should continue, in order to make available more solutions able to improve courseware contents and motivate students for learning. The work presented in this paper contributes for that purpose, in the specific area of industrial automation. After a brief introduction to the Remote Experimentation concept, we describe a remote accessible lab infrastructure that enables users to conduct real experiments with an important and widely used transducer in industrial automation, named Linear Variable Differential Transformer.
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This paper proposes an online mechanism that can evaluate the sensitivity of single event upsets (SEUs) of field programmable gate arrays (FPGAs). The online detection mechanism cyclically reads and compares the values form the external and internal configuration memories, taking into account the mask information. This remote detection method also signals any mismatch as a result of a SEU that affects both used and not-used FPGA parts, which maximizes the monitored area. By utilizing an external, Web-accessible controller that is connected to the test infrastructure, the possibility of running the same operation in a remote manner is enabled. Moreover, the need for a local memory to store the mask values is also eliminated.
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The increasing complexity of VLSI circuits and the reduced accessibility of modern packaging and mounting technologies restrict the usefulness of conventional in-circuit debugging tools, such as in-circuit emulators for microprocessors and microcontrollers. However, this same trend enables the development of more complex products, which in turn require more powerful debugging tools. These conflicting demands could be met if the standard scan test infrastructures now common in most complex components were able to match the debugging requirements of design verification and prototype validation. This paper analyses the main debug requirements in the design of microprocessor-based applications and the feasibility of their implementation using the mandatory, optional and additional operating modes of the standard IEEE 1149.1 test infrastructure.
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It is already more than 10 years that weblabs are seen as important resources to provide the experimental work required in engineering education. Several weblabs have been applied in engineering courses, but there are still unsolved problems related to the development of their infrastructures. For solving some of those problems, it was implemented a weblab with a reconfigurable infrastructure compliant with the IEEE1451.0 Std. and supported by Field Programmable Gate Array (FPGA) technology. This paper presents the referred weblab, and provides and analyses a set of researchers' opinions about the implemented infrastructure, and the adopted methodology for the conduction of real experiments.
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This paper describes how to extend the access to remote experiments from mobile devices, aiming to better engage digital native students who expect a more interactive and ubiquitous access mode. The extension is based on features of HTML5 and the jQuery Mobile framework, which allow accessing the experiments from different operating systems via the browser or native applications. As a result, users have a richer interaction mode with the experiments, which includes access from simple hand-held devices such as smartphones and PDAs. Extending the access to remote experiments, from simple devices, enables its use in other educational stages, such as high schools, where teachers struggle to engage students in STEM learning. By enabling students to use their everyday "technological companions", e.g. cellular phones, to access remote experiments, we seek to increase the educational value of this technology-enhanced learning resource.
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Recent trends show an increasing number of weblabs, implemented at universities and schools, supporting practical training in technical courses and providing the ability to remotely conduct experiments. However, their implementation is typically based on individual architectures, unable of being reconfigured with different instruments/modules usually required by every experiment. In this paper, we discuss practical guidelines for implementing reconfigurable weblabs that support both local and remote control interfaces. The underlying infrastructure is based on reconfigurable, low-cost, FPGA-based boards supporting several peripherals that are used for the local interface. The remote interface is powered by a module capable of communicating with an Ethernet based network and that can either correspond to an internal core of the FPGA or an external device. These two approaches are discussed in the paper, followed by a practical implementation example.
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Nos últimos anos, o avanço da tecnologia e a miniaturização de diversos componentes de electrónica associados a novos conceitos têm permitido nascer novas ideias e projectos, que até há alguns anos não passariam de ficção científica. Talvez o exemplo mais acabado seja actualmente o smartphone, um pequeno bloco de hardware e software, com capacidade de processamento que ultrapassa várias vezes o dos computadores com uma dúzia de anos. Estas capacidades têm sido utilizadas em comunicações, blocos de notas, agendas e até entretenimento. No entanto, podem ser reutilizadas para ajudar a resolver algumas limitações/constrangimentos da actualidade. Dentro destes destacam-se a gestão de recursos escassos. Com efeito, o consumo de energia eléctrica tem aumentado como consequência directa do desenvolvimento global e aumento do número de aparelhos eléctricos. Uma percentagem significativa de energia eléctrica tem sido produzida através de recursos não-renováveis de energia. No entanto, a dependência energética, associada à subida de preços e a redução das emissões de gases do efeito estufa, estimula o desenvolvimento de novas soluções que permitam lidar com esta situação. O desempenho energético por sua vez depende não só das características da estrutura, mas também do comportamento do utilizador. O desempenho energético dos edifícios é muito importante, uma vez que os respectivos consumos são responsáveis por mais de metade do total da energia produzida. Desta forma, a fim de alcançar um melhor desempenho é importante não só considerar o desempenho de estrutura, mas também monitorizar o comportamento do utilizador. Esta última questão coloca várias limitações, uma vez que depende muito do tipo de utilizador. Um dos conceitos actuais emergentes são as chamadas redes de sensores sem fio. Com esta tecnologia, pequenos módulos podem ser desenvolvidos com muitas possibilidades de conectividade, com elevado poder de processamento e com grande autonomia, sem serem excessivamente caros. Isto proporciona os meios para implementar vários dispositivos em toda a instalação, para recolher uma variedade de dados, sendo posteriormente armazenados num servidor. Os blocos fundamentais da infra-estrutura de sensores do projecto foram concebidos na Evoleo Technologies em simultâneo com o decorrer do estágio. Estes blocos recolhem dados específicos na instalação, e periodicamente enviam para o servidor central os valores recolhidos, onde são armazenados e colocados à disposição do utilizador. Os dados recolhidos podem então ser apresentados ao utilizador, proporcionando um registo de consumo de energia associado a um dado período de tempo. Uma vez que todos os dados são armazenados no servidor, podem ser efectuados estudos para determinar o uso típico, possíveis problemas em aparelhos, a qualidade da energia eléctrica, etc., permitindo determinar onde a energia está a ser eventualmente desperdiçada e fornecendo dados ao utilizador para que este possa proceder a alterações, tendo por base dados recolhidos num dado período. O objectivo principal deste trabalho passa por estabelecer a ligação entre o nível máquina e o nível de utilizador, isto é, uma plataforma de interacção entre dispositivos e administrador da instalação. Fornecer os dados de uma forma fácil e sem necessidade de instalação de software específico em cada dispositivo que se pretenda utilizar para monitorizar foi uma das principais preocupações das fases de concepção do projecto.
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Mestrado em Engenharia Electrotécnica e de Computadores - Área de Especialização de Telecomunicações
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Mestrado em Engenharia Civil – ramo Tecnologia e Gestão das Construções
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To increase the amount of logic available to the users in SRAM-based FPGAs, manufacturers are using nanometric technologies to boost logic density and reduce costs, making its use more attractive. However, these technological improvements also make FPGAs particularly vulnerable to configuration memory bit-flips caused by power fluctuations, strong electromagnetic fields and radiation. This issue is particularly sensitive because of the increasing amount of configuration memory cells needed to define their functionality. A short survey of the most recent publications is presented to support the options assumed during the definition of a framework for implementing circuits immune to bit-flips induction mechanisms in memory cells, based on a customized redundant infrastructure and on a detection-and-fix controller.
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Institutions have been creating their own specific weblab infrastructures. Usually, they use distinct software and hardware architectures comprehending instruments and modules (I&M) able to be parameterized but difficult to be shared. These aspects are impairing their widespread in education, since collaboration between institutions, in developing and sharing resources, is still low. To handle both aspects, this paper proposes the adoption of the IEEE1451.0 Std. with FPGA technology for creating reconfigurable weblab infrastructures. It is suggested the adoption of an IEEE1451.0 infrastructure with compatible instruments, described in Hardware Description Languages (HDL), to be reconfigured in FPGA-based boards. Besides an overview of the IEEE1451.0 Std., this paper presents a solution currently under development which seeks to enable the reconfiguration and the remote control of weblab infrastructures using a set of IEEE1451.0 HTTP commands.