38 resultados para Multipath execution


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Um túnel é uma obra subterrânea dimensionada com o objetivo de satisfazer diversas necessidades num mundo onde o planeamento urbano e a gestão de espaços ganha cada vez mais importância. A execução de este género de obras de engenharia pode ter várias finalidades, que podem ir desde a construção/reabilitação de redes de saneamento, abastecimento de água ou gás (túneis de pequeno diâmetro) até à construção/modernização de redes pedonais, rodoviárias ou ferroviárias, galerias mineiras, tuneis para barragens, etc. (túneis de grande diâmetro). As tuneladoras são uma das ferramentas de desmonte mais utilizadas na execução de obras subterrâneas. Existem no mercado vários tipos de máquinas tuneladoras, a sua escolha e dimensionamento depende de diversos fatores que devem ser cuidadosamente analisados, nomeadamente tipo de terreno a escavar, presença ou não de água na zona de escavação, dureza e/ou abrasividade das formações a atravessar, etc. Será feita uma abordagem aos princípios de funcionamento de este tipo de equipamentos, indicando o seu campo de aplicação dentro da respetiva tecnologia de escavação onde se inserem. Finalmente será desenvolvido o caso da empreitada: “Execução da Travessia do Rio Ave, da Estação Elevatória de Vila do Conde e dos Sistemas Elevatória da Aguçadoura e da Apúlia 4 - AR 44.0.08”, onde em alternativa ao desvio provisório do Rio Ave em Vila do Conde foi projetada a execução de duas travessias no diâmetro 1200 mm, uma delas escavadas maioritariamente em terreno aluvionar brando e a outra em terreno rochoso duro e abrasivo com recurso, em ambos casos, à utilização de máquina tuneladora. Através da avaliação do desempenho do equipamento escolhido para execução de este trabalho será estudada a eficiência da utilização deste tipo de equipamento. Com o objetivo de mostrar os custos associados à execução de obras de escavação subterrânea com recurso a utilização de máquinas tuneladoras, será feita uma análise económica e comparativa relativa aos dois casos de obra apresentados.

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Atualmente, a escavação de poços em locais densamente ocupados requer medidas severas para reduzir riscos e possíveis influências quer na própria obra quer em estruturas próximas. Neste campo, a instrumentação geotécnica e a sua monitorização tem um papel determinante na execução de obras geotécnicas, sendo que neste trabalho é dado um especial realce à instrumentação utilizada, às atividades de observação geotécnica, bem como à análise e interpretação das leituras para o controlo de movimentos induzidos no terreno pelas escavações. Este acompanhamento é baseado num plano de instrumentação, sendo descrito de uma forma transversal a importância do projeto e em particular das fases do processo de investigação geotécnica. O acompanhamento da execução dos poços para a futura Estação da Reboleira, permitiu validar as soluções de projeto para um determinado método construtivo, determinadas através de métodos numéricos e semi-empíricos, e abordados neste trabalho. A monitorização sistemática desde o início das escavações até ao revestimento secundário, permitiu tecer apreciações sobre os valores obtidos, apresentando-se alguns registos. Todas estas ações visam controlar e antecipar riscos de acidentes provocados pela execução de escavações, pelo que nesta tese é também realçada a importância da segurança e higiene no trabalho na prevenção dos riscos profissionais, independentemente da sua origem.

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In real-time systems, there are two distinct trends for scheduling task sets on unicore systems: non-preemptive and preemptive scheduling. Non-preemptive scheduling is obviously not subject to any preemption delay but its schedulability may be quite poor, whereas fully preemptive scheduling is subject to preemption delay, but benefits from a higher flexibility in the scheduling decisions. The time-delay involved by task preemptions is a major source of pessimism in the analysis of the task Worst-Case Execution Time (WCET) in real-time systems. Preemptive scheduling policies including non-preemptive regions are a hybrid solution between non-preemptive and fully preemptive scheduling paradigms, which enables to conjugate both world's benefits. In this paper, we exploit the connection between the progression of a task in its operations, and the knowledge of the preemption delays as a function of its progression. The pessimism in the preemption delay estimation is then reduced in comparison to state of the art methods, due to the increase in information available in the analysis.

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Embedded real-time applications increasingly present high computation requirements, which need to be completed within specific deadlines, but that present highly variable patterns, depending on the set of data available in a determined instant. The current trend to provide parallel processing in the embedded domain allows providing higher processing power; however, it does not address the variability in the processing pattern. Dimensioning each device for its worst-case scenario implies lower average utilization, and increased available, but unusable, processing in the overall system. A solution for this problem is to extend the parallel execution of the applications, allowing networked nodes to distribute the workload, on peak situations, to neighbour nodes. In this context, this report proposes a framework to develop parallel and distributed real-time embedded applications, transparently using OpenMP and Message Passing Interface (MPI), within a programming model based on OpenMP. The technical report also devises an integrated timing model, which enables the structured reasoning on the timing behaviour of these hybrid architectures.

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In embedded systems, the timing behaviour of the control mechanisms are sometimes of critical importance for the operational safety. These high criticality systems require strict compliance with the offline predicted task execution time. The execution of a task when subject to preemption may vary significantly in comparison to its non-preemptive execution. Hence, when preemptive scheduling is required to operate the workload, preemption delay estimation is of paramount importance. In this paper a preemption delay estimation method for floating non-preemptive scheduling policies is presented. This work builds on [1], extending the model and optimising it considerably. The preemption delay function is subject to a major tightness improvement, considering the WCET analysis context. Moreover more information is provided as well in the form of an extrinsic cache misses function, which enables the method to provide a solution in situations where the non-preemptive regions sizes are small. Finally experimental results from the implementation of the proposed solutions in Heptane are provided for real benchmarks which validate the significance of this work.

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Smartphones and other internet enabled devices are now common on our everyday life, thus unsurprisingly a current trend is to adapt desktop PC applications to execute on them. However, since most of these applications have quality of service (QoS) requirements, their execution on resource-constrained mobile devices presents several challenges. One solution to support more stringent applications is to offload some of the applications’ services to surrogate devices nearby. Therefore, in this paper, we propose an adaptable offloading mechanism which takes into account the QoS requirements of the application being executed (particularly its real-time requirements), whilst allowing offloading services to several surrogate nodes. We also present how the proposed computing model can be implemented in an Android environment

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The usage of COTS-based multicores is becoming widespread in the field of embedded systems. Providing realtime guarantees at design-time is a pre-requisite to deploy real-time systems on these multicores. This necessitates the consideration of the impact of the contention due to shared low-level hardware resources on the Worst-Case Execution Time (WCET) of the tasks. As a step towards this aim, this paper first identifies the different factors that make the WCET analysis a challenging problem in a typical COTS-based multicore system. Then, we propose and prove, a mathematically correct method to determine tight upper bounds on the WCET of the tasks, when they are co-scheduled on different cores.

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Preemptions account for a non-negligible overhead during system execution. There has been substantial amount of research on estimating the delay incurred due to the loss of working sets in the processor state (caches, registers, TLBs) and some on avoiding preemptions, or limiting the preemption cost. We present an algorithm to reduce preemptions by further delaying the start of execution of high priority tasks in fixed priority scheduling. Our approaches take advantage of the floating non-preemptive regions model and exploit the fact that, during the schedule, the relative task phasing will differ from the worst-case scenario in terms of admissible preemption deferral. Furthermore, approximations to reduce the complexity of the proposed approach are presented. Substantial set of experiments demonstrate that the approach and approximations improve over existing work, in particular for the case of high utilisation systems, where savings of up to 22% on the number of preemption are attained.

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Most current-generation Wireless Sensor Network (WSN) nodes are equipped with multiple sensors of various types, and therefore support for multi-tasking and multiple concurrent applications is becoming increasingly common. This trend has been fostering the design of WSNs allowing several concurrent users to deploy applications with dissimilar requirements. In this paper, we extend the advantages of a holistic programming scheme by designing a novel compiler-assisted scheduling approach (called REIS) able to identify and eliminate redundancies across applications. To achieve this useful high-level optimization, we model each user application as a linear sequence of executable instructions. We show how well-known string-matching algorithms such as the Longest Common Subsequence (LCS) and the Shortest Common Super-sequence (SCS) can be used to produce an optimal merged monolithic sequence of the deployed applications that takes into account embedded scheduling information. We show that our approach can help in achieving about 60% average energy savings in processor usage compared to the normal execution of concurrent applications.

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Consider the problem of designing an algorithm with a high utilisation bound for scheduling sporadic tasks with implicit deadlines on identical processors. A task is characterised by its minimum interarrival time and its execution time. Task preemption and migration is permitted. Still, low preemption and migration counts are desirable. We formulate an algorithm with a utilisation bound no less than 66.¯6%, characterised by worst-case preemption counts comparing favorably against the state-of-the-art.

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This paper proposes a dynamic scheduler that supports the coexistence of guaranteed and non-guaranteed bandwidth servers to efficiently handle soft-tasks’ overloads by making additional capacity available from two sources: (i) residual capacity allocated but unused when jobs complete in less than their budgeted execution time; (ii) stealing capacity from inactive non-isolated servers used to schedule best-effort jobs. The effectiveness of the proposed approach in reducing the mean tardiness of periodic jobs is demonstrated through extensive simulations. The achieved results become even more significant when tasks’ computation times have a large variance.

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Consider the problem of scheduling n sporadic tasks so as to meet deadlines on m identical processors. A task is characterised by its minimum interarrival time and its worst-case execution time. Tasks are preemptible and may migrate between processors. We propose an algorithm with limited migration, configurable for a utilisation bound of 88% with few preemptions (and arbitrarily close to 100% with more preemptions).

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Fault injection is frequently used for the verification and validation of dependable systems. When targeting real time microprocessor based systems the process becomes significantly more complex. This paper proposes two complementary solutions to improve real time fault injection campaign execution, both in terms of performance and capabilities. The methodology is based on the use of the on-chip debug mechanisms present in modern electronic devices. The main objective is the injection of faults in microprocessor memory elements with minimum delay and intrusiveness. Different configurations were implemented and compared in terms of performance gain and logic overhead.

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The rapid increase in the use of microprocessor-based systems in critical areas, where failures imply risks to human lives, to the environment or to expensive equipment, significantly increased the need for dependable systems, able to detect, tolerate and eventually correct faults. The verification and validation of such systems is frequently performed via fault injection, using various forms and techniques. However, as electronic devices get smaller and more complex, controllability and observability issues, and sometimes real time constraints, make it harder to apply most conventional fault injection techniques. This paper proposes a fault injection environment and a scalable methodology to assist the execution of real-time fault injection campaigns, providing enhanced performance and capabilities. Our proposed solutions are based on the use of common and customized on-chip debug (OCD) mechanisms, present in many modern electronic devices, with the main objective of enabling the insertion of faults in microprocessor memory elements with minimum delay and intrusiveness. Different configurations were implemented starting from basic Components Off-The-Shelf (COTS) microprocessors, equipped with real-time OCD infrastructures, to improved solutions based on modified interfaces, and dedicated OCD circuitry that enhance fault injection capabilities and performance. All methodologies and configurations were evaluated and compared concerning performance gain and silicon overhead.

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O aproveitamento de pneus em fim de vida revela ser uma alternativa eficaz e promissora na indústria da construção civil, na utilização deste resíduo em muros de suporte. O presente trabalho tem como principal objetivo a apresentação de uma técnica de aproveitamento de pneus em fim de vida na execução de muros de gravidade, combinando solo e pneus. Neste sentido, tomou-se como referência um estudo realizado no Brasil por Sieira, Sayão, Medeiros e Gerscovich, para avaliar a eficiência e o custo deste tipo de estruturas, comparando-o com um muro de suporte tradicional de betão simples. Inicialmente, avaliou-se a segurança do muro de solo-pneus, de acordo com a metodologia proposta no Eurocódigo 7 (NP EN 1997-1, 2010), considerando a geometria e as características dos materiais apresentados no estudo referido e usando o programa de cálculo automático Slide, da Rocscience, para a verificação da estabilidade global. Reproduziu-se a análise numérica realizada no âmbito do caso de estudo brasileiro de referência, recorrendo também a uma formulação por elementos finitos com o programa de cálculo automático Phase2, da Rocscience. Por último, utilizando uma vez mais o programa Slide, definiu-se a geometria de um muro de betão simples cuja geometria garantisse o mesmo valor do fator de segurança à estabilidade global, obtido com o muro de solo-pneus e compararam-se os custos respetivos. O presente trabalho confirmou a eficiência e o baixo custo desta solução construtiva, sendo necessários, no entanto, estudos mais detalhados que reforcem estas conclusões.