Solid-state Marx based two-switch voltage modulator for the On-Line Isotope Mass Separator accelerator at the European Organization for Nuclear Research

A new circuit topology is proposed to replace the actual pulse transformer and thyratron based resonant modulator that supplies the 60 kV target potential for the ion acceleration of the On-Line Isotope Mass Separator accelerator, the stability of which is critical for the mass resolution downstream separator, at the European Organization for Nuclear Research. The improved modulator uses two solid-state switches working together, each one based on the Marx generator concept, operating as series and parallel switches, reducing the stress on the series stacked semiconductors, and also as auxiliary pulse generator in order to fulfill the target requirements. Preliminary results of a 10 kV prototype, using 1200 V insulated gate bipolar transistors and capacitors in the solid-state Marx circuits, ten stages each, with an electrical equivalent circuit of the target, are presented, demonstrating both the improved voltage stability and pulse flexibility potential wanted for this new modulator.

Multilevel high-voltage pulse generation based on a new modular solid-state switch

This paper describes a modular solid-state switching cell derived from the Marx generator concept to be used in topologies for generating multilevel unipolar and bipolar high-voltage (HV) pulses into resistive loads. The switching modular cell comprises two ON/OFF semiconductors, a diode, and a capacitor. This cell can be stacked, being the capacitors charged in series and their voltages balanced in parallel. To balance each capacitor voltage without needing any parameter measurement, a vector decision diode algorithm is used in each cell to drive the two switches. Simulation and experimental results, for generating multilevel unipolar and bipolar HV pulses into resistive loads are presented.

A DC Voltage-Multiplier Circuit Working as a High-Voltage Pulse Generator

The intensive use of semiconductor devices enabled the development of a repetitive high-voltage pulse-generator topology from the dc voltage-multiplier (VM) concept. The proposed circuit is based on an odd VM-type circuit, where a number of dc capacitors share a common connection with different voltage ratings in each one, and the output voltage comes from a single capacitor. Standard VM rectifier and coupling diodes are used for charging the energy-storing capacitors, from an ac power supply, and two additional on/off semiconductors in each stage, to switch from the typical charging VM mode to a pulse mode with the dc energy-storing capacitors connected in series with the load. Results from a 2-kV experimental prototype with three stages, delivering a 10-mu s pulse with a 5-kHz repetition rate into a resistive load, are discussed. Additionally, the proposed circuit is compared against the solid-state Marx generator topology for the same peak input and output voltages.

Capacity Enhancement Using MIMO Antenna Arrays in Realistic Macro-Cellular Urban Environment

In MIMO systems the antenna array configuration in the BS and MS has a large influence on the available channel capacity. In this paper, we first introduce a new Frequency Selective (FS) MIMO framework for macro-cells in a realistic urban environment. The MIMO channel is built over a previously developed directional channel model, which considers the terrain and clutter information in the cluster, line-of-sight and link loss calculations. Next, MIMO configuration characteristics are investigated in order to maximize capacity, mainly the number of antennas, inter-antenna spacing and SNR impact. Channel and capacity simulation results are presented for the city of Lisbon, Portugal, using different antenna configurations. Two power allocations schemes are considered, uniform distribution and FS spatial water-filling. The results suggest optimized MIMO configurations, considering the antenna array size limitations, specially at the MS side.

Design of improved rail-to-rail low-distortion and low-stress switches in advanced CMOS technologies

This paper describes the efficient design of an improved and dedicated switched-capacitor (SC) circuit capable of linearizing CMOS switches to allow SC circuits to reach low distortion levels. The described circuit (SC linearization control circuit, SLC) has the advantage over conventional clock-bootstrapping circuits of exhibiting low-stress, since large gate voltages are avoided. This paper presents exhaustive corner simulation results of a SC sample-and-hold (S/H) circuit which employs the proposed and optimized circuits, together with the experimental evaluation of a complete 10-bit ADC utilizing the referred S/H circuit. These results show that the SLC circuits can reduce distortion and increase dynamic linearity above 12 bits for wide input signal bandwidths.

Repetitive Solid State Pulse Modulator Based on a DC Voltage Multiplier

A newly developed solid-state repetitive high-voltage (HV) pulse modulator topology created from the mature concept of the d.c. voltage multiplier (VM) is described. The proposed circuit is based in a voltage multiplier type circuit, where a number of d.c. capacitors share a common connection with different voltage rating in each one. Hence, besides the standard VM rectifier and coupling diodes, two solid-state on/off switches are used, in each stage, to switch from the typical charging VM mode to a pulse mode with the d.c. capacitors connected in series with the load. Due to the on/off semiconductor configuration, in half-bridge structures, the maximum voltage blocked by each one is the d.c. capacitor voltage in each stage. A 2 kV prototype is described and the results are compared with PSPICE simulations.

Garantia de qualidade de serviço (QOS) em arquitecturas MPLS

Os prestadores de serviços de telecomunicações e operadores de telecomunicações deparam-se com um aumento exponencial das necessidades de largura de banda. A evolução e massificação dos serviços Internet e Intranet pelos serviços públicos e privados deixaram de ser uma mera adaptação do protocolo TCP, à qualidade da ligação sendo uma necessidade a diferenciação do tráfego. As metodologias que asseguram uma qualidade de serviço no âmbito dos fornecedores de serviços internet são a forma de garantir uma qualidade de serviço adequada a cada tipo de tráfego. Estas metodologias são suportadas pela rede IP MPLS dos diversos operadores de telecomunicações no transporte dos diversos serviços dos seus clientes empresarias e domésticos no acesso à internet dos diversos serviços públicos de dados e voz e nas redes virtuais privadas. Os portais aplicacionais são a interface directa com o cliente para definição dos acordos de nível de serviço “Service Level Agreements” e a sua associação à especificação dos níveis de serviço “Service Level Specification”, para posterior relação com a definição de métricas adequadas à qualidade de serviço acordada com o cliente no desenho dos serviços de uma rede IP “MultiProtocol Label Switch”. A proposta consiste em criar uma metodologia para mapear as necessidades de serviços dos clientes em SLAs e registá-los numa base de dados, separando claramente a qualidade do serviço vista na óptica do operador em: arquitectura de rede de transporte, arquitectura do serviço e arquitectura de monitoria. Estes dados são mapeados em parâmetros e especificações de implementação dos serviços de suporte ao negócio do operador tendo em vista a criação de um “Work Flow” fim a fim. Paralelamente define-se os serviços a disponibilizar comercialmente, o conjunto de serviços suportados pela rede e tecnologia IP MPLS com a parametrização de ”Quality of Service Assurance” adequada a cada um, cria-se uma arquitectura de rede de suporte ao transporte base entre os diversos equipamentos agregadores de acessos através do “Backbone”, define-se uma arquitectura de suporte para cada tipo de serviço independente da arquitectura de transporte. Neste trabalho implementam-se algumas arquitecturas de QoS estudadas no IP MPLS em simuladores disponibilizados pela comunidade “Open Source” e analisamos as vantagens de desvantagens de cada uma. Todas as necessidades são devidamente equacionadas, prevendo o seu crescimento, desempenho, estabelecendo regras de distribuição de largura de banda e análise de desempenho, criando redes escaláveis e com estimativas de crescimento optimistas. Os serviços são desenhados de forma a adaptarem-se à evolução das necessidades aplicacionais, ao crescimento do número de utilizadores e evolução do próprio serviço.

Modelling of n-stage Blumlein stacked lines for bipolar pulse generation

A Blumlein line is a particular Pulse Forming Line, PFL, configuration that allows the generation of high-voltage sub-microsecond square pulses, with the same voltage amplitude as the dc charging voltage, into a matching load. By stacking n Blumlein lines one can multiply in theory by n the input dc voltage charging amplitude. In order to understand the operating behavior of this electromagnetic system and to further optimize its operation it is fundamental to theoretically model it, that is to calculate the voltage amplitudes at each circuit point and the time instant that happens. In order to do this, one needs to define the reflection and transmission coefficients where impedance discontinuity occurs. The experimental results of a fast solid-state switch, which discharges a three stage Blumlein stack, will be compared with theoretical ones.

New Technique for Uniform Voltage Sharing in Series Stacked Semiconductors

This paper describes the operation of a solid-state series stacked topology used as a serial and parallel switch in pulsed power applications. The proposed circuit, developed from the Marx generator concept, balances the voltage stress on each series stacked semiconductor, distributing the total voltage evenly. Experimental results from a 10 kV laboratory series stacked switch, using 1200 V semiconductors in a ten stages solid-state series stacked circuit, are reported and discussed, considering resistive, capacitive and inductive type loads for high and low duty factor voltage pulse operation.

O regime de exigibilidade de caixa no IVA

Mestrado em Contabilidade

Reconfigurable SiC Embedded Photonic Structures with Self Optical Bias Control

Multilayered heterostructures based on embedded a-Si:H and a-SiC:H p-i-n filters are analyzed from differential voltage design perspective using short- and long-pass filters. The transfer functions characteristics are presented. A numerical simulation is presented to explain the filtering properties of the photonic devices. Several monochromatic pulsed lights, separately (input channels) or in a polychromatic mixture (multiplexed signal) at different bit rates, illuminated the device. Steady-state optical bias is superimposed from the front and the back side. Results show that depending on the wavelength of the external background and impinging side, the device acts either as a short- or a long-pass band filter or as a band-stop filter. Particular attention is given to the amplification coefficient weights, which allow to take into account the wavelength background effects when a band or frequency needs to be filtered or the gate switch, in which optical active filter gates are used to select and filter input signals to specific output ports in wavelength division multiplexing (WDM) communication systems. This nonlinearity provides the possibility for selective removal or addition of wavelengths. A truth table of an encoder that performs 8-to-1 MUX function exemplifies the optoelectronic conversion.

Leilões combinados

Mestrado em Controlo de Gestão e dos Negócios

Partial utility-driven scheduling for flexible SLA and pricing arbitration in clouds

Cloud SLAs compensate customers with credits when average availability drops below certain levels. This is too inflexible because consumers lose non-measurable amounts of performance being only compensated later, in next charging cycles. We propose to schedule virtual machines (VMs), driven by range-based non-linear reductions of utility, different for classes of users and across different ranges of resource allocations: partial utility. This customer-defined metric, allows providers transferring resources between VMs in meaningful and economically efficient ways. We define a comprehensive cost model incorporating partial utility given by clients to a certain level of degradation, when VMs are allocated in overcommitted environments (Public, Private, Community Clouds). CloudSim was extended to support our scheduling model. Several simulation scenarios with synthetic and real workloads are presented, using datacenters with different dimensions regarding the number of servers and computational capacity. We show the partial utility-driven driven scheduling allows more VMs to be allocated. It brings benefits to providers, regarding revenue and resource utilization, allowing for more revenue per resource allocated and scaling well with the size of datacenters when comparing with an utility-oblivious redistribution of resources. Regarding clients, their workloads’ execution time is also improved, by incorporating an SLA-based redistribution of their VM’s computational power.

Pentagonal parch-excited sectorized antenna for localization systems

A pentagonal patch-excited sectorized antenna (SA) suitable for 2.4-2.5 GHz localization systems was studied and developed. The integration of six patch-excited structures converges into a sectorized antenna called Hive5 that provides gain improvement compared to a patch antenna, maximum variation of 3 dB beam width over the radiation pattern and circular polarization (CP). This antenna is presented and analyzed taking into account the tap length and the flare angle. The proposed antenna in combination with a RF-Switch provides a cost effective solution for localization based on Wireless Sensor Networks (WSN) and will be used for implementing angle of arrival (AoA) techniques combined with RF fingerprinting techniques.

Marx-Type solid-state bipolar modulator topologies: Performance comparison

The operation of generalized Marx-type solid-state bipolar modulators is discussed and compared with simplified Marx-derived circuits, to evaluate their capability to deal with various load conditions. A comparative analysis on the number of switches per cell, fiber optic trigger count, losses, and switch hold-off voltages has been made. A circuit topology is obtained as a compromise in terms of operating performance, trigger simplicity, and switching losses. A five-stage laboratory prototype of this circuit has been assembled using 1200 V insulated gate bipolar transistors (IGBTs) and diodes, operating with 1000 V dc input voltage and 1 kHz frequency, giving 5 kV bipolar pulses, with 2.5 mu s pulse width and 5 mu s relaxation time into resistive, capacitive, and inductive loads.