Towards an Academic Social Network for Bologna Process

The Bologna Process aimed to build a European Higher Education Area promoting student's mobility. The adoption of Bologna Declaration directives requires a self management distributed approach to deal with student's mobility, allowing frequent updates in institutions rules or legislation. This paper suggests a computational system architecture, which follows a social network design. A set of structured annotations is proposed in order to organize the user's information. For instance, when the user is a student its annotations are organized into an academic record. The academic record data is used to discover interests, namely mobility interests, among students that belongs the academic network. These ideas have been applied into a demonstrator that includes a mobility simulator to compare and show the student's academic evolution.

Design of a sea-level tsunami detection network for the Gulf of Cadiz

The devastating impact of the Sumatra tsunami of 26 December 2004, raised the question for scientists of how to forecast a tsunami threat. In 2005, the IOC-UNESCO XXIII assembly decided to implement a global tsunami warning system to cover the regions that were not yet protected, namely the Indian Ocean, the Caribbean and the North East Atlantic, the Mediterranean and connected seas (the NEAM region). Within NEAM, the Gulf of Cadiz is the more sensitive area, with an important record of devastating historical events. The objective of this paper is to present a preliminary design for a reliable tsunami detection network for the Gulf of Cadiz, based on a network of sea-level observatories. The tsunamigenic potential of this region has been revised in order to define the active tectonic structures. Tsunami hydrodynamic modeling and GIS technology have been used to identify the appropriate locations for the minimum number of sea-level stations. Results show that 3 tsunameters are required as the minimum number of stations necessary to assure an acceptable protection to the large coastal population in the Gulf of Cadiz. In addition, 29 tide gauge stations could be necessary to fully assess the effects of a tsunami along the affected coasts of Portugal, Spain and Morocco.

Optimal design for active damping in sandwich structures using the Direct MultiSearch method

This paper addresses the problem of optimal positioning of surface bonded piezoelectric patches in sandwich plates with viscoelastic core and laminated face layers. The objective is to maximize a set of modal loss factors for a given frequency range using multiobjective topology optimization. Active damping is introduced through co-located negative velocity feedback control. The multiobjective topology optimization problem is solved using the Direct MultiSearch Method. An application to a simply supported sandwich plate is presented with results for the maximization of the first six modal loss factors. The influence of the finite element mesh is analyzed and the results are, to some extent, compared with those obtained using alternative single objective optimization. (C) 2013 Elsevier Ltd. All rights reserved.

Optimal design for active damping in sandwich structures using the Direct MultiSearch method

This paper addresses the problem of optimal positioning of surface bonded piezoelectric patches in sandwich plates with viscoelastic core and laminated face layers. The objective is to maximize a set of modal loss factors for a given frequency range using multiobjective topology optimization. Active damping is introduced through co-located negative velocity feedback control. The multiobjective topology optimization problem is solved using the Direct MultiSearch Method. An application to a simply supported sandwich plate is presented with results for the maximization of the first six modal loss factors. The influence of the finite element mesh is analyzed and the results are, to some extent, compared with those obtained using alternative single objective optimization.

Determination of stresses around a cylindrical single pile caused by horizontal movements of soils with the finitive element method

This study was carried out with the aim of modeling in 2D, in plain strain, the movement of a soft cohesive soil around a pile, in order to enable the determination of stresses resulting along the pile, per unit length. The problem in study fits into the large deformations problem and can be due to landslide, be close of depth excavations, to be near of zones where big loads are applied in the soil, etc. In this study is used an constitutive Elasto-Plastic model with the failure criterion of Mohr-Coulomb to model the soil behavior. The analysis is developed considering the soil in undrained conditions. To the modeling is used the finite element program PLAXIS, which use the Updated Lagrangian - Finite Element Method (UL-FEM). In this work, special attention is given to the soil-pile interaction, where is presented with some detail the formulation of the interface elements and some studies for a better understand of his behavior. It is developed a 2-D model that simulates the effect of depth allowing the study of his influence in the stress distribution around the pile. The results obtained give an important base about how behaves the movement of the soil around a pile, about how work the finite element program PLAXIS and how is the stress distribution around the pile. The analysis demonstrate that the soil-structure interaction modeled with the UL-FEM and interface elements is more appropriate to small deformations problems.

Direct Color Sensor, Optical Amplifier and Demux Device Integrated on a Single Monolithic SiC Photodetector

A pi'n/pin a-SiC:H voltage and optical bias controlled device is presented and its behavior as image and color sensor, optical amplifier and demux device is discussed. The design and the light source properties are correlated with the sensor output characteristics. Different readout techniques are used. When a low power monochromatic scanner readout the generated carriers the transducer recognizes a color pattern projected on it acting as a direct color and image sensor. Scan speeds up to 10(4) lines per second are achieved without degradation in the resolution. If the photocurrent generated by different monochromatic pulsed channels is readout directly, the information is demultiplexed. Results show that it is possible to decode the information from three simultaneous color channels without bit errors at bit rates per channel higher than 4000 bps. Finally, when triggered by light of appropriated wavelength, it can amplify or suppress the generated photocurrent working as an optical amplifier (C) 2009 Published by Elsevier Ltd.

Um site, um conteúdo e incontáveis dispositivos: as estratégias de design utilizadas para ambientes multiplataformas

Dissertação apresentada à Escola Superior de Comunicação Social como parte dos requisitos para obtenção de grau de mestre em Audiovisual e Multimédia.

Modeling for control design of a multi-reach water canal

This article addresses the problem of obtaining reduced complexity models of multi-reach water delivery canals that are suitable for robust and linear parameter varying (LPV) control design. In the first stage, by applying a method known from the literature, a finite dimensional rational transfer function of a priori defined order is obtained for each canal reach by linearizing the Saint-Venant equations. Then, by using block diagrams algebra, these different models are combined with linearized gate models in order to obtain the overall canal model. In what concerns the control design objectives, this approach has the advantages of providing a model with prescribed order and to quantify the high frequency uncertainty due to model approximation. A case study with a 3-reach canal is presented, and the resulting model is compared with experimental data. © 2014 IEEE.

Efficient Implementation Of A Single-Precision Floating-Point Arithmetic Unit on FPGA

This paper presents a single precision floating point arithmetic unit with support for multiplication, addition, fused multiply-add, reciprocal, square-root and inverse squareroot with high-performance and low resource usage. The design uses a piecewise 2nd order polynomial approximation to implement reciprocal, square-root and inverse square-root. The unit can be configured with any number of operations and is capable to calculate any function with a throughput of one operation per cycle. The floatingpoint multiplier of the unit is also used to implement the polynomial approximation and the fused multiply-add operation. We have compared our implementation with other state-of-the-art proposals, including the Xilinx Core-Gen operators, and conclude that the approach has a high relative performance/area efficiency. © 2014 Technical University of Munich (TUM).

Modeling for control design of a multi-reach water canal

This article addresses the problem of obtaining reduced complexity models of multi-reach water delivery canals that are suitable for robust and linear parameter varying (LPV) control design. In the first stage, by applying a method known from the literature, a finite dimensional rational transfer function of a priori defined order is obtained for each canal reach by linearizing the Saint-Venant equations. Then, by using block diagrams algebra, these different models are combined with linearized gate models in order to obtain the overall canal model. In what concerns the control design objectives, this approach has the advantages of providing a model with prescribed order and to quantify the high frequency uncertainty due to model approximation. A case study with a 3-reach canal is presented, and the resulting model is compared with experimental data. © 2014 IEEE.

The daily and hourly energy consumption and load forecasting using artifitial neural network method: a case study using a set of 93 households in Portugal

It is important to understand and forecast a typical or a particularly household daily consumption in order to design and size suitable renewable energy systems and energy storage. In this research for Short Term Load Forecasting (STLF) it has been used Artificial Neural Networks (ANN) and, despite the consumption unpredictability, it has been shown the possibility to forecast the electricity consumption of a household with certainty. The ANNs are recognized to be a potential methodology for modeling hourly and daily energy consumption and load forecasting. Input variables such as apartment area, numbers of occupants, electrical appliance consumption and Boolean inputs as hourly meter system were considered. Furthermore, the investigation carried out aims to define an ANN architecture and a training algorithm in order to achieve a robust model to be used in forecasting energy consumption in a typical household. It was observed that a feed-forward ANN and the Levenberg-Marquardt algorithm provided a good performance. For this research it was used a database with consumption records, logged in 93 real households, in Lisbon, Portugal, between February 2000 and July 2001, including both weekdays and weekend. The results show that the ANN approach provides a reliable model for forecasting household electric energy consumption and load profile. © 2014 The Author.

Charged higgs bosons in single top production at the LHC

We show that a light charged Higgs boson signal via tau(+/-)nu decay can be established at the Large Hadron Collider (LHC) also in the case of single top production. This process complements searches for the same signal in the case of charged Higgs bosons emerging from t (t) over bar production. The models accessible include the Minimal Supersymmetric Standard Model (MSSM) as well a variety of 2-Higgs Doublet Models (2HDMs). High energies and luminosities are however required, thereby restricting interest on this mode to the case of the LHC running at 14TeV with design configuration.

Algorithm-oriented design of efficient many-core architectures applied to dense matrix multiplication

Recent integrated circuit technologies have opened the possibility to design parallel architectures with hundreds of cores on a single chip. The design space of these parallel architectures is huge with many architectural options. Exploring the design space gets even more difficult if, beyond performance and area, we also consider extra metrics like performance and area efficiency, where the designer tries to design the architecture with the best performance per chip area and the best sustainable performance. In this paper we present an algorithm-oriented approach to design a many-core architecture. Instead of doing the design space exploration of the many core architecture based on the experimental execution results of a particular benchmark of algorithms, our approach is to make a formal analysis of the algorithms considering the main architectural aspects and to determine how each particular architectural aspect is related to the performance of the architecture when running an algorithm or set of algorithms. The architectural aspects considered include the number of cores, the local memory available in each core, the communication bandwidth between the many-core architecture and the external memory and the memory hierarchy. To exemplify the approach we did a theoretical analysis of a dense matrix multiplication algorithm and determined an equation that relates the number of execution cycles with the architectural parameters. Based on this equation a many-core architecture has been designed. The results obtained indicate that a 100 mm(2) integrated circuit design of the proposed architecture, using a 65 nm technology, is able to achieve 464 GFLOPs (double precision floating-point) for a memory bandwidth of 16 GB/s. This corresponds to a performance efficiency of 71 %. Considering a 45 nm technology, a 100 mm(2) chip attains 833 GFLOPs which corresponds to 84 % of peak performance These figures are better than those obtained by previous many-core architectures, except for the area efficiency which is limited by the lower memory bandwidth considered. The results achieved are also better than those of previous state-of-the-art many-cores architectures designed specifically to achieve high performance for matrix multiplication.

Multiobjective design of viscoelastic laminated composite sandwich panels

The optimal design of laminated sandwich panels with viscoelastic core is addressed in this paper, with the objective of simultaneously minimizing weight and material cost and maximizing modal damping. The design variables are the number of layers in the laminated sandwich panel, the layer constituent materials and orientation angles and the viscoelastic layer thickness. The problem is solved using the Direct MultiSearch (DMS) solver for multiobjective optimization problems which does not use any derivatives of the objective functions. A finite element model for sandwich plates with transversely compressible viscoelastic core and anisotropic laminated face layers is used. Trade-off Pareto optimal fronts are obtained and the results are analyzed and discussed.

A many-core co-processor for embedded parallel computing on FPGA

Single processor architectures are unable to provide the required performance of high performance embedded systems. Parallel processing based on general-purpose processors can achieve these performances with a considerable increase of required resources. However, in many cases, simplified optimized parallel cores can be used instead of general-purpose processors achieving better performance at lower resource utilization. In this paper, we propose a configurable many-core architecture to serve as a co-processor for high-performance embedded computing on Field-Programmable Gate Arrays. The architecture consists of an array of configurable simple cores with support for floating-point operations interconnected with a configurable interconnection network. For each core it is possible to configure the size of the internal memory, the supported operations and number of interfacing ports. The architecture was tested in a ZYNQ-7020 FPGA in the execution of several parallel algorithms. The results show that the proposed many-core architecture achieves better performance than that achieved with a parallel generalpurpose processor and that up to 32 floating-point cores can be implemented in a ZYNQ-7020 SoC FPGA.