A CMOS micro power switched-capacitor DC-DC step-up converter for indoor light energy harvesting applications

This paper presents a micro power light energy harvesting system for indoor environments. Light energy is collected by amorphous silicon photovoltaic (a-Si:H PV) cells, processed by a switched capacitor (SC) voltage doubler circuit with maximum power point tracking (MPPT), and finally stored in a large capacitor. The MPPT fractional open circuit voltage (V-OC) technique is implemented by an asynchronous state machine (ASM) that creates and dynamically adjusts the clock frequency of the step-up SC circuit, matching the input impedance of the SC circuit to the maximum power point condition of the PV cells. The ASM has a separate local power supply to make it robust against load variations. In order to reduce the area occupied by the SC circuit, while maintaining an acceptable efficiency value, the SC circuit uses MOSFET capacitors with a charge sharing scheme for the bottom plate parasitic capacitors. The circuit occupies an area of 0.31 mm(2) in a 130 nm CMOS technology. The system was designed in order to work under realistic indoor light intensities. Experimental results show that the proposed system, using PV cells with an area of 14 cm(2), is capable of starting-up from a 0 V condition, with an irradiance of only 0.32 W/m(2). After starting-up, the system requires an irradiance of only 0.18 W/m(2) (18 mu W/cm(2)) to remain operating. The ASM circuit can operate correctly using a local power supply voltage of 453 mV, dissipating only 0.085 mu W. These values are, to the best of the authors' knowledge, the lowest reported in the literature. The maximum efficiency of the SC converter is 70.3 % for an input power of 48 mu W, which is comparable with reported values from circuits operating at similar power levels.

Photo-induced instability of nanocrystalline silicon TFTs

We examine the instability behavior of nanocrystalline silicon (nc-Si) thin-film transistors (TFTs) in the presence of electrical and optical stress. The change in threshold voltage and sub-threshold slope is more significant under combined bias-and-light stress when compared to bias stress alone. The threshold voltage shift (Delta V-T) after 6 h of bias stress is about 7 times larger in the case with illumination than in the dark. Under bias stress alone, the primary instability mechanism is charge trapping at the semiconductor/insulator interface. In contrast, under combined bias-and-light stress, the prevailing mechanism appears to be the creation of defect states in the channel, and believed to take place in the amorphous phase, where the increase in the electron density induced by electrical bias enhances the non-radiative recombination of photo-excited electron-hole pairs. The results reported here are consistent with observations of photo-induced efficiency degradation in solar cells.

Design of improved rail-to-rail low-distortion and low-stress switches in advanced CMOS technologies

This paper describes the efficient design of an improved and dedicated switched-capacitor (SC) circuit capable of linearizing CMOS switches to allow SC circuits to reach low distortion levels. The described circuit (SC linearization control circuit, SLC) has the advantage over conventional clock-bootstrapping circuits of exhibiting low-stress, since large gate voltages are avoided. This paper presents exhaustive corner simulation results of a SC sample-and-hold (S/H) circuit which employs the proposed and optimized circuits, together with the experimental evaluation of a complete 10-bit ADC utilizing the referred S/H circuit. These results show that the SLC circuits can reduce distortion and increase dynamic linearity above 12 bits for wide input signal bandwidths.

Image and color recognition using amorphous silicon p-i-n photodiodes

Large area hydrogenated amorphous silicon single and stacked p-i-n structures with low conductivity doped layers are proposed as monochrome and color image sensors. The layers of the structures are based on amorphous silicon alloys (a-Si(x)C(1-x):H). The current-voltage characteristics and the spectral sensitivity under different bias conditions are analyzed. The output characteristics are evaluated under different read-out voltages and scanner wavelengths. To extract information on image shape, intensity and color, a modulated light beam scans the sensor active area at three appropriate bias voltages and the photoresponse in each scanning position ("sub-pixel") is recorded. The investigation of the sensor output under different scanner wavelengths and varying electrical bias reveals that the response can be tuned, thus enabling color separation. The operation of the sensor is exemplified and supported by a numerical simulation.

Transport properties in microcrystalline silicon solar cells under AM1.5 illumination analysed by two-dimensional numerical simulation

Microcrystalline silicon is a two-phase material. Its composition can be interpreted as a series of grains of crystalline silicon imbedded in an amorphous silicon tissue, with a high concentration of dangling bonds in the transition regions. In this paper, results for the transport properties of a mu c-Si:H p-i-n junction obtained by means of two-dimensional numerical simulation are reported. The role played by the boundary regions between the crystalline grains and the amorphous matrix is taken into account and these regions are treated similar to a heterojunction interface. The device is analysed under AM1.5 illumination and the paper outlines the influence of the local electric field at the grain boundary transition regions on the internal electric configuration of the device and on the transport mechanism within the mu c-Si:H intrinsic layer.

A DC-DC Step-Up mu-Power Converter for Energy Harvesting Applications, Using Maximum Power PointTracking, Based on Fractional Open Circuit Voltage

A DC-DC step-up micro power converter for solar energy harvesting applications is presented. The circuit is based on a switched-capacitorvoltage tripler architecture with MOSFET capacitors, which results in an, area approximately eight times smaller than using MiM capacitors for the 0.131mu m CMOS technology. In order to compensate for the loss of efficiency, due to the larger parasitic capacitances, a charge reutilization scheme is employed. The circuit is self-clocked, using a phase controller designed specifically to work with an amorphous silicon solar cell, in order to obtain themaximum available power from the cell. This will be done by tracking its maximum power point (MPPT) using the fractional open circuit voltage method. Electrical simulations of the circuit, together with an equivalent electrical model of an amorphous silicon solar cell, show that the circuit can deliver apower of 1132 mu W to the load, corresponding to a maximum efficiency of 66.81%.

Ageing effects on the wettability behavior of laser textured silicon

In the present work we investigate the ageing of acid cleaned femtosecond laser textured < 100 > silicon surfaces. Changes in the surface structure and chemistry were analysed by Rutherford backscattering spectrometry (RBS) and X-ray photoelectron spectroscopy (XPS), in order to explain the variation with time of the water contact angles of the laser textured surfaces. It is shown that highly hydrophobic silicon surfaces are obtained immediately after laser texturing and cleaning with acid solutions (water contact angle >120 degrees). However these surfaces are not stable and ageing leads to a decrease of the water contact angle which reaches a value of 80 degrees. XPS analysis of the surfaces shows that the growth of the native oxide layer is most probably responsible for this behavior. (C) 2010 Elsevier B.V. All rights reserved.

Boron-doped nanocrystalline silicon thin films for solar cells

This article reports on the structural, electronic, and optical properties of boron-doped hydrogenated nanocrystalline silicon (nc-Si: H) thin films. The films were deposited by plasma-enhanced chemical vapour deposition (PECVD) at a substrate temperature of 150 degrees C. Crystalline volume fraction and dark conductivity of the films were determined as a function of trimethylboron-to-silane flow ratio. Optical constants of doped and undoped nc-Si: H were obtained from transmission and reflection spectra. By employing p(+) nc-Si: H as a window layer combined with a p' a-SiC buffer layer, a-Si: H-based p-p'-i-n solar cells on ZnO:Al-coated glass substrates were fabricated. Device characteristics were obtained from current-voltage and spectral-response measurements. (C) 2011 Elsevier B. V. All rights reserved.

Membrane selectivity versus sensor response in hydrogenated amorphous silicon CHEMFETs using a semi-empirical model

Toxic amides, such as acrylamide, are potentially harmful to Human health, so there is great interest in the fabrication of compact and economical devices to measure their concentration in food products and effluents. The CHEmically Modified Field Effect Transistor (CHEMFET) based onamorphous silicon technology is a candidate for this type of application due to its low fabrication cost. In this article we have used a semi-empirical modelof the device to predict its performance in a solution of interfering ions. The actual semiconductor unit of the sensor was fabricated by the PECVD technique in the top gate configuration. The CHEMFET simulation was performed based on the experimental current voltage curves of the semiconductor unit and on an empirical model of the polymeric membrane. Results presented here are useful for selection and design of CHEMFET membranes and provide an idea of the limitations of the amorphous CHEMFET device. In addition to the economical advantage, the small size of this prototype means it is appropriate for in situ operation and integration in a sensor array.

Measurement of Photo Capacitance in Amorphous Silicon Photodiodes

This paper discusses the photodiode capacitance dependence on imposed light and applied voltage using different devices. The first device is a double amorphous silicon pin-pin photodiode; the second one a crystalline pin diode and the last one a single pin amorphous silicon diode. Double amorphous silicon diodes can be used as (de)multiplexer devices for optical communications. For short range applications, using plastic optical fibres, the WDM (wavelength-division multiplexing) technique can be used in the visible light range to encode multiple signals. Experimental results consist on measurements of the photodiode capacitance under different conditions of imposed light and applied voltage. The relation between the capacitive effects of the double diode and the quality of the semiconductor internal junction will be analysed. The dynamics of charge accumulations will be measured when the photodiode is illuminated by a pulsed monochromatic light.

Sub-micron structuring of silicon using femtosecond laser interferometry

We report the fabrication of planar sub-micron gratings in silicon with a period of 720 nm using a modified Michelson interferometer and femtosecond laser radiation. The gratings consist of alternated stripes of laser ablated and unmodified material. Ablated stripes are bordered by parallel ridges which protrude above the unmodified material. In the regions where ridges are formed, the laser radiation intensity is not sufficient to cause ablation. Nevertheless, melting and a significant temperature increase are expected, and ridges may be formed due to expansion of silicon during resolidification or silicon oxidation. These conclusions are consistent with the evolution of the stripes morphology as a function of the distance from the center of the grating. (C) 2013 Elsevier Ltd. All rights reserved.

A 5GHz/1.8V CMOS Active Balun Integrated with LNA

The development of high performance monolithic RF front-ends requires innovative RF circuit design to make the best of a good technology. A fully differential approach is usually preferred, due to its well-known properties. Although the differential approach must be preserved inside the chip, there are cases where the input signal is single-ended such as RF image filters and IF filters in a RF receiver. In these situations, a stage able to convert single-ended into differential signals (balun) is needed. The most cited topology, which is capable of providing high gain, consists on a differential stage with one of the two inputs grounded. Unfortunately, this solution has some drawbacks when implemented monolithically. This work presents the design and simulated results of an innovative high-performance monolithic single to differential converter, which overcomes the limitations of the circuits.The integration of the monolithic active balun circuit with an LNA on a 0.18μm CMOS process is also reported. The circuits presented here are aimed at 802.11a. Section 2 describes the balun circuit and section 3 presents its performance when it is connected to a conventional single-ended LNA. Section 4 shows the simulated performance results focused at phase/amplitude balance and noise figure. Finally, the last section draws conclusions and future work.

A 5GHz1.8V Low Power CMOS Low-Noise Amplifier

Wireless local-area networks (WLANs) have been deployed as office and home communications infrastructures worldwide. The diversification of the standards, such as IEEE 802.11 series demands the design of RF front-ends. Low power consumption is one of the most important design concerns in the application of those technologies. To maintain competitive hardware costs, CMOS has been used since it is the best solution for low cost and high integration processing, allowing analog circuits to be mixed with digital ones. In the receiver chain, the low noise amplifier (LNA) is one of the most critical blocks in a transceiver design. The sensitivity is mainly determined by the LNA noise figure and gain. It interfaces with the pre-select filter and the mixer. Furthermore, since it is the first gain stage, care must be taken to provide accurate input match, low-noise figure, good linearity and a sufficient gain over a wide band of operation. Several CMOS LNAs have been reported during the last decade, showing that the most research has been done at 802.11/b and GSM standards (900-2400MHz spectrum) and more recently at 802.11/a (5GHz band). One of the more significant disadvantages of 802.11/b is that the frequency band is crowded and subject to interference from other technologies, as is 2.4GHz cordless phones and Bluetooth. As the demand for radio-frequency integrated circuits, operating at higher frequency bands, increases, the IEEE 802.11/a standard becomes a very attractive option to wireless communication system developers. This paper presents the design and implementation of a low power, low noise amplifier aimed at IEEE 802.11a for WLAN applications. It was designed to be integrated with an active balun and mixer, representing the first step toward a fully integrated monolithic WLAN receiver. All the required circuits are integrated at the same die and are powered by 1.8V supply source. Preliminary experimental results (S-parameters) are shown and promise excellent results. The LNA circuit design details are illustrated in Section 2. Spectre simulation results focused at gain, noise figure (NF) and input/output matching are presented in Section 3. Finally, conclusions and comparison with other recently reported LNAs are made in Section 4, followed by future work.

Lightweight amorphous silicon photovoltaic modules on flexible plastic substrate

Solar cells on lightweight and flexible substrates have advantages over glass-or wafer-based photovoltaic devices in both terrestrial and space applications. Here, we report on development of amorphous silicon thin film photovoltaic modules fabricated at maximum deposition temperature of 150 degrees C on 100 mu m thick polyethylene-naphtalate plastic films. Each module of 10 cm x 10 cm area consists of 72 a-Si:H n-i-p rectangular structures with transparent conducting oxide top electrodes with Al fingers and metal back electrodes deposited through the shadow masks. Individual structures are connected in series forming eight rows with connection ports provided for external blocking diodes. The design optimization and device performance analysis are performed using a developed SPICE model.

Sub-micron structuring of silicon using femtosecond laser interferometry

We report the fabrication of planar sub-micron gratings in silicon with a period of 720 nm using a modified Michelson interferometer and femtosecond laser radiation. The gratings consist of alternated stripes of laser ablated and unmodified material. Ablated stripes are bordered by parallel ridges which protrude above the unmodified material. In the regions where ridges are formed, the laser radiation intensity is not sufficient to cause ablation. Nevertheless, melting and a significant temperature increase are expected, and ridges may be formed due to expansion of silicon during resolidification or silicon oxidation. These conclusions are consistent with the evolution of the stripes morphology as a function of the distance from the center of the grating.