6 resultados para Reconfigurable devices

em Repositório Científico do Instituto Politécnico de Lisboa - Portugal


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Due to the application of active components into antennas these became a source of distortion on wireless communication systems. In this paper we explore the nonlinear effects occurring in a frequency reconfigurable antenna operating with a PIN Diode. We describe the measurement setup used to check the antenna intermodulation products and the measured compression and third order intermodulation limitations of a frequency reconfigurable antenna, operating at the UMTS and WLAN frequencies.

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This paper proposes a possible implementation of a compact printed monopole antenna, useful to operate in UMTS and WLAN bands. In order to accomplish that, a miniaturization technique based on the application of chip inductors is used in conjunction with frequency reconfiguration capability. The chip inductors change the impedance response of the monopole, allowing to reduce the resonant frequency. In order to be able to operate the antenna in these two different frequencies, an antenna reconfiguration technique based on PIN diodes is applied. This procedure allows the change of the active form of the antenna leading to a shift in the resonant frequency. The prototype measurements show good agreement with the simulation results.

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In this paper we present results about the functioning of a multilayered a-SiC:H heterostructure as a device for wavelength-division demultiplexing of optical signals. The device is composed of two stacked p-i-n photodiodes, both optimized for the selective collection of photogenerated carriers. Band gap engineering was used to adjust the photogeneration and recombination rates profiles of the intrinsic absorber regions of each photodiode to short and long wavelength absorption and carrier collection in the visible spectrum. The photocurrent signal using different input optical channels was analyzed at reverse and forward bias and under steady state illumination. This photocurrent is used as an input for a demux algorithm based on the voltage controlled sensitivity of the device. The device functioning is explained with results obtained by numerical simulation of the device, which permit an insight to the internal electric configuration of the double heterojunction.These results address the explanation of the device functioning in the frequency domain to a wavelength tunable photocapacitance due to the accumulation of space charge localized at the internal junction. The existence of a direct relation between the experimentally observed capacitive effects of the double diode and the quality of the semiconductor materials used to form the internal junction is highlighted.

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Trabalho Final de Mestrado para obtenção do grau de Mestrado em Engenharia Electrónica e Telecomunicações

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Trabalho de Projeto realizado para obtenção do grau de Mestre em Engenharia Informática e de Computadores

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Sparse matrix-vector multiplication (SMVM) is a fundamental operation in many scientific and engineering applications. In many cases sparse matrices have thousands of rows and columns where most of the entries are zero, while non-zero data is spread over the matrix. This sparsity of data locality reduces the effectiveness of data cache in general-purpose processors quite reducing their performance efficiency when compared to what is achieved with dense matrix multiplication. In this paper, we propose a parallel processing solution for SMVM in a many-core architecture. The architecture is tested with known benchmarks using a ZYNQ-7020 FPGA. The architecture is scalable in the number of core elements and limited only by the available memory bandwidth. It achieves performance efficiencies up to almost 70% and better performances than previous FPGA designs.