A comparative benchmarking analysis of main Iberian container terminals: a DEA approach

Benchmarking is an important tool to organisations to improve their productivity, product quality, process efficiency or services. From Benchmarking the organisations could compare their performance with competitors and identify their strengths and weaknesses. This study intends to do a benchmarking analysis on the main Iberian Sea ports with a special focus on their container terminals efficiency. To attain this, the DEA (data envelopment analysis) is used since it is considered by several researchers as the most effective method to quantify a set of key performance indicators. In order to reach a more reliable diagnosis tool the DEA is used together with the data mining in comparing the sea ports operational data of container terminals during 2007.Taking into account that sea ports are global logistics networks the performance evaluation is essential to an effective decision making in order to improve their efficiency and, therefore, their competitiveness.

Optoelectronic Logic Functions Based on Reconfigurable SiC Multilayer Devices

WDM multilayered SiC/Si devices based on a-Si:H and a-SiC:H filter design are approached from a reconfigurable point of view. Results show that the devices, under appropriated optical bias, act as reconfigurable active filters that allow optical switching and optoelectronic logic functions development. Under front violet irradiation the magnitude of the red and green channels are amplified and the blue and violet reduced. Violet back irradiation cuts the red channel, slightly influences the magnitude of the green and blue ones and strongly amplifies de violet channel. This nonlinearity provides the possibility for selective removal of useless wavelengths. Particular attention is given to the amplification coefficient weights, which allow taking into account the wavelength background effects when a band needs to be filtered from a wider range of mixed signals, or when optical active filter gates are used to select and filter input signals to specific output ports in WDM communication systems. A truth table of an encoder that performs 8-to-1 multiplexer (MUX) function is presented.

Reconfigurable SiC Embedded Photonic Structures with Self Optical Bias Control

Multilayered heterostructures based on embedded a-Si:H and a-SiC:H p-i-n filters are analyzed from differential voltage design perspective using short- and long-pass filters. The transfer functions characteristics are presented. A numerical simulation is presented to explain the filtering properties of the photonic devices. Several monochromatic pulsed lights, separately (input channels) or in a polychromatic mixture (multiplexed signal) at different bit rates, illuminated the device. Steady-state optical bias is superimposed from the front and the back side. Results show that depending on the wavelength of the external background and impinging side, the device acts either as a short- or a long-pass band filter or as a band-stop filter. Particular attention is given to the amplification coefficient weights, which allow to take into account the wavelength background effects when a band or frequency needs to be filtered or the gate switch, in which optical active filter gates are used to select and filter input signals to specific output ports in wavelength division multiplexing (WDM) communication systems. This nonlinearity provides the possibility for selective removal or addition of wavelengths. A truth table of an encoder that performs 8-to-1 MUX function exemplifies the optoelectronic conversion.

Análise do transporte ferroviário de mercadorias associado à problemática da diferença de bitola entre linhas da rede ferroviária: estudo do caso prático: ligação do porto de Aveiro ao corredor internacional de mercadorias E-80

Trabalho Final de Mestrado para obtenção do grau de Mestre em Engenharia Civil

Caracterização de estruturas portuárias: caso de estudo: ampliação do Terminal XXI, Sines

Relatório de Estágio para obtenção do grau de Mestre em Engenharia Civil

Lightweight amorphous silicon photovoltaic modules on flexible plastic substrate

Solar cells on lightweight and flexible substrates have advantages over glass-or wafer-based photovoltaic devices in both terrestrial and space applications. Here, we report on development of amorphous silicon thin film photovoltaic modules fabricated at maximum deposition temperature of 150 degrees C on 100 mu m thick polyethylene-naphtalate plastic films. Each module of 10 cm x 10 cm area consists of 72 a-Si:H n-i-p rectangular structures with transparent conducting oxide top electrodes with Al fingers and metal back electrodes deposited through the shadow masks. Individual structures are connected in series forming eight rows with connection ports provided for external blocking diodes. The design optimization and device performance analysis are performed using a developed SPICE model.

The impact of different power dividers used in a non-uniform planar antenna array

Wireless communications are widely used for various applications, requiring antennas with different features. Often, to achieve the desired radiation pattern, is necessary to employ antenna arrays, using non-uniform excitation on its elements. Power dividers can be used and the best known are the T-junction and the Wilkinson power divider, whose main advantage is the isolation between output ports. In this paper the impact of this isolation on the overall performance of a circularly polarized planar antenna array using non-uniform excitation is investigated. Results show a huge decrease of the array bandwidths either in terms of return loss or in polarization, without resistors. © 2014 IEEE.

Influência do modelo de governação das administrações portuárias no seu desempenho

Mestrado em Auditoria

Deterministic approach for multiple-source tsunami hazard assessment for Sines, Portugal

In this paper, we present a deterministic approach to tsunami hazard assessment for the city and harbour of Sines, Portugal, one of the test sites of project ASTARTE (Assessment, STrategy And Risk Reduction for Tsunamis in Europe). Sines has one of the most important deep-water ports, which has oil-bearing, petrochemical, liquid-bulk, coal, and container terminals. The port and its industrial infrastructures face the ocean southwest towards the main seismogenic sources. This work considers two different seismic zones: the Southwest Iberian Margin and the Gloria Fault. Within these two regions, we selected a total of six scenarios to assess the tsunami impact at the test site. The tsunami simulations are computed using NSWING, a Non-linear Shallow Water model wIth Nested Grids. In this study, the static effect of tides is analysed for three different tidal stages: MLLW (mean lower low water), MSL (mean sea level), and MHHW (mean higher high water). For each scenario, the tsunami hazard is described by maximum values of wave height, flow depth, drawback, maximum inundation area and run-up. Synthetic waveforms are computed at virtual tide gauges at specific locations outside and inside the harbour. The final results describe the impact at the Sines test site considering the single scenarios at mean sea level, the aggregate scenario, and the influence of the tide on the aggregate scenario. The results confirm the composite source of Horseshoe and Marques de Pombal faults as the worst-case scenario, with wave heights of over 10 m, which reach the coast approximately 22 min after the rupture. It dominates the aggregate scenario by about 60 % of the impact area at the test site, considering maximum wave height and maximum flow depth. The HSMPF scenario inundates a total area of 3.5 km2. © Author(s) 2015.

A many-core co-processor for embedded parallel computing on FPGA

Single processor architectures are unable to provide the required performance of high performance embedded systems. Parallel processing based on general-purpose processors can achieve these performances with a considerable increase of required resources. However, in many cases, simplified optimized parallel cores can be used instead of general-purpose processors achieving better performance at lower resource utilization. In this paper, we propose a configurable many-core architecture to serve as a co-processor for high-performance embedded computing on Field-Programmable Gate Arrays. The architecture consists of an array of configurable simple cores with support for floating-point operations interconnected with a configurable interconnection network. For each core it is possible to configure the size of the internal memory, the supported operations and number of interfacing ports. The architecture was tested in a ZYNQ-7020 FPGA in the execution of several parallel algorithms. The results show that the proposed many-core architecture achieves better performance than that achieved with a parallel generalpurpose processor and that up to 32 floating-point cores can be implemented in a ZYNQ-7020 SoC FPGA.