Mass spectrometry improvement on an high current ion implanter

The development of accurate mass spectrometry, enabling the identification of all the ions extracted from the ion source in a high current implanter is described. The spectrometry system uses two signals (x-y graphic), one proportional to the magnetic field (x-axes), taken from the high-voltage potential with an optic fiber system, and the other proportional to the beam current intensity (y-axes), taken from a beam-stop. The ion beam mass register in a mass spectrum of all the elements magnetically analyzed with the same radius and defined by a pair of analyzing slits as a function of their beam intensity is presented. The developed system uses a PC to control the displaying of the extracted beam mass spectrum, and also recording of all data acquired for posterior analysis. The operator uses a LabView code that enables the interfacing between an I/O board and the ion implanter. The experimental results from an ion implantation experiment are shown. (C) 2011 Elsevier B.V. All rights reserved.

A many-core co-processor for embedded parallel computing on FPGA

Single processor architectures are unable to provide the required performance of high performance embedded systems. Parallel processing based on general-purpose processors can achieve these performances with a considerable increase of required resources. However, in many cases, simplified optimized parallel cores can be used instead of general-purpose processors achieving better performance at lower resource utilization. In this paper, we propose a configurable many-core architecture to serve as a co-processor for high-performance embedded computing on Field-Programmable Gate Arrays. The architecture consists of an array of configurable simple cores with support for floating-point operations interconnected with a configurable interconnection network. For each core it is possible to configure the size of the internal memory, the supported operations and number of interfacing ports. The architecture was tested in a ZYNQ-7020 FPGA in the execution of several parallel algorithms. The results show that the proposed many-core architecture achieves better performance than that achieved with a parallel generalpurpose processor and that up to 32 floating-point cores can be implemented in a ZYNQ-7020 SoC FPGA.