10 resultados para Design structure matrix
em Repositório Científico do Instituto Politécnico de Lisboa - Portugal
Resumo:
This paper presents the design and compares the performance of linear, decoupled and direct power controllers (DPC) for three-phase matrix converters operating as unified power flow controllers (UPFC). A simplified steady-state model of the matrix converter-based UPFC fitted with a modified Venturini high-frequency pulse width modulator is first used to design the linear controllers for the transmission line active (P) and reactive (Q) powers. In order to minimize the resulting cross coupling between P and Q power controllers, decoupled linear controllers (DLC) are synthesized using inverse dynamics linearization. DPC are then developed using sliding-mode control techniques, in order to guarantee both robustness and decoupled control. The designed P and Q power controllers are compared using simulations and experimental results. Linear controllers show acceptable steady-state behaviour but still exhibit coupling between P and Q powers in transient operation. DLC are free from cross coupling but are parameter sensitive. Results obtained by DPC show decoupled power control with zero error tracking and faster responses with no overshoot and no steady-state error. All the designed controllers were implemented using the same digital signal processing hardware.
Resumo:
Laminate composite multi-cell structures have to support both axial and shear stresses when sustaining variable twist. Thus the properties and design of the laminate may not be the most adequate at all cross-sections to support the torsion imposed on the cells. In this work, the effect of some material and geometric parameters on the optimal mechanical behaviour of a multi-cell composite laminate structure is studied when torsion is present. A particle swarm optimization technique is used to maximize the multi-cell structure torsion constant that can be used to obtain the angle of twist of the composite laminate profile.
Resumo:
Recent integrated circuit technologies have opened the possibility to design parallel architectures with hundreds of cores on a single chip. The design space of these parallel architectures is huge with many architectural options. Exploring the design space gets even more difficult if, beyond performance and area, we also consider extra metrics like performance and area efficiency, where the designer tries to design the architecture with the best performance per chip area and the best sustainable performance. In this paper we present an algorithm-oriented approach to design a many-core architecture. Instead of doing the design space exploration of the many core architecture based on the experimental execution results of a particular benchmark of algorithms, our approach is to make a formal analysis of the algorithms considering the main architectural aspects and to determine how each particular architectural aspect is related to the performance of the architecture when running an algorithm or set of algorithms. The architectural aspects considered include the number of cores, the local memory available in each core, the communication bandwidth between the many-core architecture and the external memory and the memory hierarchy. To exemplify the approach we did a theoretical analysis of a dense matrix multiplication algorithm and determined an equation that relates the number of execution cycles with the architectural parameters. Based on this equation a many-core architecture has been designed. The results obtained indicate that a 100 mm(2) integrated circuit design of the proposed architecture, using a 65 nm technology, is able to achieve 464 GFLOPs (double precision floating-point) for a memory bandwidth of 16 GB/s. This corresponds to a performance efficiency of 71 %. Considering a 45 nm technology, a 100 mm(2) chip attains 833 GFLOPs which corresponds to 84 % of peak performance These figures are better than those obtained by previous many-core architectures, except for the area efficiency which is limited by the lower memory bandwidth considered. The results achieved are also better than those of previous state-of-the-art many-cores architectures designed specifically to achieve high performance for matrix multiplication.
Resumo:
This paper presents the design and implementation of direct power controllers for three-phase matrix converters (MC) operating as Unified Power Flow Controllers (UPFC). Theoretical principles of the decoupled linear power controllers of the MC-UPFC to minimize the cross-coupling between active and reactive power control are established. From the matrix converter based UPFC model with a modified Venturini high frequency PWM modulator, decoupled controllers for the transmission line active (P) and reactive (Q) power direct control are synthesized. Simulation results, obtained from Matlab/Simulink, are presented in order to confirm the proposed approach. Results obtained show decoupled power control, zero error tracking, and fast responses with no overshoot and no steady-state error.
Resumo:
A package of B-spline finite strip models is developed for the linear analysis of piezolaminated plates and shells. This package is associated to a global optimization technique in order to enhance the performance of these types of structures, subjected to various types of objective functions and/or constraints, with discrete and continuous design variables. The models considered are based on a higher-order displacement field and one can apply them to the static, free vibration and buckling analyses of laminated adaptive structures with arbitrary lay-ups, loading and boundary conditions. Genetic algorithms, with either binary or floating point encoding of design variables, were considered to find optimal locations of piezoelectric actuators as well as to determine the best voltages applied to them in order to obtain a desired structure shape. These models provide an overall economy of computing effort for static and vibration problems.
Resumo:
Low-density parity-check (LDPC) codes are nowadays one of the hottest topics in coding theory, notably due to their advantages in terms of bit error rate performance and low complexity. In order to exploit the potential of the Wyner-Ziv coding paradigm, practical distributed video coding (DVC) schemes should use powerful error correcting codes with near-capacity performance. In this paper, new ways to design LDPC codes for the DVC paradigm are proposed and studied. The new LDPC solutions rely on merging parity-check nodes, which corresponds to reduce the number of rows in the parity-check matrix. This allows to change gracefully the compression ratio of the source (DCT coefficient bitplane) according to the correlation between the original and the side information. The proposed LDPC codes reach a good performance for a wide range of source correlations and achieve a better RD performance when compared to the popular turbo codes.
Resumo:
This study was developed with the purpose to investigate the effect of polysaccharide/plasticiser concentration on the microstructure and molecular dynamics of polymeric film systems, using transmission electron microscope imaging (TEM) and nuclear magnetic resonance (NMR) techniques. Experiments were carried out in chitosan/glycerol films prepared with solutions of different composition. The films obtained after drying and equilibration were characterised in terms of composition, thickness and water activity. Results show that glycerol quantities used in film forming solutions were responsible for films composition; while polymer/total plasticiser ratio in the solution determined the thickness (and thus structure) of the films. These results were confirmed by TEM. NMR allowed understanding the films molecular rearrangement. Two different behaviours for the two components analysed, water and glycerol were observed: the first is predominantly moving free in the matrix, while glycerol is mainly bounded to the chitosan chain. (C) 2013 Elsevier Ltd. All rights reserved.
Resumo:
Stair nesting allows us to work with fewer observations than the most usual form of nesting, the balanced nesting. In the case of stair nesting the amount of information for the different factors is more evenly distributed. This new design leads to greater economy, because we can work with fewer observations. In this work we present the algebraic structure of the cross of balanced nested and stair nested designs, using binary operations on commutative Jordan algebras. This new cross requires fewer observations than the usual cross balanced nested designs and it is easy to carry out inference.
Resumo:
Cellulose and its derivatives, such as hydroxypropylcellulose (HPC) have been studied for a long time but they are still not well understood particularly in liquid crystalline solutions. These systems can be at the origin of networks with properties similar to liquid crystalline (LC) elastomers. The films produced from LC solutions can be manipulated by the action of moisture allowing for instance the development of a soft motor (Geng et al., 2013) driven by humidity. Cellulose nanocrystals (CNC), which combine cellulose properties with the specific characteristics of nanoscale materials, have been mainly studied for their potential as a reinforcing agent. Suspensions of CNC can also self-order originating a liquid-crystalline chiral nematic phases. Considering the liquid crystalline features that both LC-HPC and CNC can acquire, we prepared LC-HPC/CNC solutions with different CNC contents (1,2 and 5 wt.%). The effect of the CNC into the LC-HPC matrix was determined by coupling rheology and NMR spectroscopy - Rheo-NMR a technique tailored to analyse orientational order in sheared systems. (C) 2015 Elsevier Ltd. All rights reserved.
Resumo:
Sparse matrix-vector multiplication (SMVM) is a fundamental operation in many scientific and engineering applications. In many cases sparse matrices have thousands of rows and columns where most of the entries are zero, while non-zero data is spread over the matrix. This sparsity of data locality reduces the effectiveness of data cache in general-purpose processors quite reducing their performance efficiency when compared to what is achieved with dense matrix multiplication. In this paper, we propose a parallel processing solution for SMVM in a many-core architecture. The architecture is tested with known benchmarks using a ZYNQ-7020 FPGA. The architecture is scalable in the number of core elements and limited only by the available memory bandwidth. It achieves performance efficiencies up to almost 70% and better performances than previous FPGA designs.