Retratos de uma musa do século XXI: a figura feminina na GQ Portugal

Relatório de estágio apresentado à Escola Superior de Comunicação Social como parte dos requisitos para obtenção de grau de mestre em Jornalismo.

Estudo de caso de malformação congénita, com quantificação do êmbolo em 4 sistemas de suspensão para próteses endosqueléticas transtibiais com encaixe TSB

Introdução – O efeito de êmbolo é um dos principais problemas relacionados com a eficácia de uma prótese. Uma diminuição do mesmo pode levar a uma marcha mais natural através do aumento da propriocetividade. Objetivos – Verificar se existe diferença de valores do efeito de êmbolo entre vários sistemas de suspensão para próteses transtibiais com a utilização de Liners e testar a aplicação de testes de imagiologia na análise da melhor solução protésica para um determinado indivíduo. Metodologia – Foi obtida uma radiografia da prótese em carga na posição ortostática, mantendo o peso do indivíduo igualmente distribuído pelos dois pés. Seguidamente foi realizada outra radiografia no plano sagital com o joelho com 30° de flexão, com a prótese suspensa e um peso de 5kg aplicado na extremidade distal da mesma durante 30 seg. Através destes dois exames efetuaram-se as medições do êmbolo para cada tipo de sistema de suspensão. Resultados – Dos quatro sistemas estudados apenas três apresentam valores de êmbolo, visto que um dos sistemas não criou suspensão suficiente para suportar o peso colocado na extremidade distal da prótese. Através das medições realizadas nos exames imagiológicos dos três sistemas pudemos encontrar variações de efeito de êmbolo que vão dos 47,91mm aos 72,55mm. Conclusão – Através da realização do estudo imagiológico verificaram-se diferenças a nível do efeito de êmbolo nos vários sistemas de suspensão, provando que esta é uma ferramenta viável na avaliação do mesmo. Também através da análise dos resultados ficou notório que o sistema de suspensão Vacuum Assisted Suspention System (VASS) é o que apresenta menos êmbolo.

BITalino: a novel hardware framework for physiological computing

Physical computing has spun a true global revolution in the way in which the digital interfaces with the real world. From bicycle jackets with turn signal lights to twitter-controlled christmas trees, the Do-it-Yourself (DiY) hardware movement has been driving endless innovations and stimulating an age of creative engineering. This ongoing (r)evolution has been led by popular electronics platforms such as the Arduino, the Lilypad, or the Raspberry Pi, however, these are not designed taking into account the specific requirements of biosignal acquisition. To date, the physiological computing community has been severely lacking a parallel to that found in the DiY electronics realm, especially in what concerns suitable hardware frameworks. In this paper, we build on previous work developed within our group, focusing on an all-in-one, low-cost, and modular biosignal acquisition hardware platform, that makes it quicker and easier to build biomedical devices. We describe the main design considerations, experimental evaluation and circuit characterization results, together with the results from a usability study performed with volunteers from multiple target user groups, namely health sciences and electrical, biomedical, and computer engineering. Copyright © 2014 SCITEPRESS - Science and Technology Publications. All rights reserved.

Trends Of CPU, GPU and FPGA for high-performance computing

Floating-point computing with more than one TFLOP of peak performance is already a reality in recent Field-Programmable Gate Arrays (FPGA). General-Purpose Graphics Processing Units (GPGPU) and recent many-core CPUs have also taken advantage of the recent technological innovations in integrated circuit (IC) design and had also dramatically improved their peak performances. In this paper, we compare the trends of these computing architectures for high-performance computing and survey these platforms in the execution of algorithms belonging to different scientific application domains. Trends in peak performance, power consumption and sustained performances, for particular applications, show that FPGAs are increasing the gap to GPUs and many-core CPUs moving them away from high-performance computing with intensive floating-point calculations. FPGAs become competitive for custom floating-point or fixed-point representations, for smaller input sizes of certain algorithms, for combinational logic problems and parallel map-reduce problems. © 2014 Technical University of Munich (TUM).

Unified transform architecture for AVC, AVS, VC-1 and HEVC high-performance codecs

A unified architecture for fast and efficient computation of the set of two-dimensional (2-D) transforms adopted by the most recent state-of-the-art digital video standards is presented in this paper. Contrasting to other designs with similar functionality, the presented architecture is supported on a scalable, modular and completely configurable processing structure. This flexible structure not only allows to easily reconfigure the architecture to support different transform kernels, but it also permits its resizing to efficiently support transforms of different orders (e. g. order-4, order-8, order-16 and order-32). Consequently, not only is it highly suitable to realize high-performance multi-standard transform cores, but it also offers highly efficient implementations of specialized processing structures addressing only a reduced subset of transforms that are used by a specific video standard. The experimental results that were obtained by prototyping several configurations of this processing structure in a Xilinx Virtex-7 FPGA show the superior performance and hardware efficiency levels provided by the proposed unified architecture for the implementation of transform cores for the Advanced Video Coding (AVC), Audio Video coding Standard (AVS), VC-1 and High Efficiency Video Coding (HEVC) standards. In addition, such results also demonstrate the ability of this processing structure to realize multi-standard transform cores supporting all the standards mentioned above and that are capable of processing the 8k Ultra High Definition Television (UHDTV) video format (7,680 x 4,320 at 30 fps) in real time.

Virtual laboratory for educational environments

In this paper a new simulation environment for a virtual laboratory to educational proposes is presented. The Logisim platform was adopted as the base digital simulation tool, since it has a modular implementation in Java. All the hardware devices used in the laboratory course was designed as components accessible by the simulation tool, and integrated as a library. Moreover, this new library allows the user to access an external interface. This work was motivated by the needed to achieve better learning times on co-design projects, based on hardware and software implementations, and to reduce the laboratory time, decreasing the operational costs of engineer teaching. Furthermore, the use of virtual laboratories in educational environments allows the students to perform functional tests, before they went to a real laboratory. Moreover, these functional tests allow to speed-up the learning when a problem based approach methodology is considered. © 2014 IEEE.

Multifunctional controller architecture for sold-state marx modulator based on FPGA

This paper proposes a multifunctional architecture to implement field-programmable gate array (FPGA) controllers for power converters and presents a prototype for a pulsed power generator based on a solid-state Marx topology. The massively parallel nature of reconfigurable hardware platforms provides very high processing power and fast response times allowing the implementation of many subsystems in the same device. The prototype includes the controller, a failure detection system, an interface with a safety/emergency subsystem, a graphical user interface, and a virtual oscilloscope to visualize the generated pulse waveforms, using a single FPGA. The proposed architecture employs a modular design that can be easily adapted to other power converter topologies.

On lattices from combinatorial game theory modularity and a representation theorem: finite case

We show that a self-generated set of combinatorial games, S. may not be hereditarily closed but, strong self-generation and hereditary closure are equivalent in the universe of short games. In [13], the question "Is there a set which will give a non-distributive but modular lattice?" appears. A useful necessary condition for the existence of a finite non-distributive modular L(S) is proved. We show the existence of S such that L(S) is modular and not distributive, exhibiting the first known example. More, we prove a Representation Theorem with Games that allows the generation of all finite lattices in game context. Finally, a computational tool for drawing lattices of games is presented. (C) 2014 Elsevier B.V. All rights reserved.

Characterization and performance analysis of a VDFLL GNSS receiver architecture

A non-coherent vector delay/frequency-locked loop architecture for GNSS receivers is proposed. Two dynamics models are considered: PV (position and velocity) and PVA (position, velocity, and acceleration). In contrast with other vector architectures, the proposed approach does not require the estimation of signals amplitudes. Only coarse estimates of the carrier-to-noise ratios are necessary.

25 kV bipolar solid-state Marx generator for industrial food applications

The preliminary results from a bipolar industrial solidstate based Marx generator, developed for the food industry, capable of delivering 25 kV/250 A positive and negative pulses with 12 kW average power, are presented and discussed. This modular topology uses only four controlled switches per cell, 27 cells in total that can be charged up to 1000V each, the two extra cells are used for droop compensation. The triggering signals for all the switches are generated by a FPGA. Considering that biomaterials are similar to resistive type loads, experimental results from this new bipolar 25 kV modulator into resistive loads are presented and discussed.

High-level Petri nets modules for embedded controllers design

Modular design is crucial to manage large-scale systems and to support the divide-and-conquer development approach. It allows hierarchical representations and, therefore, one can have a system overview, as well as observe component details. Petri nets are suitable to model concurrent systems, but lack on structuring mechanisms to support abstractions and the composition of sub-models, in particular when considering applications to embedded controllers design. In this paper we present a module construct, and an underlying high-level Petri net type, to model embedded controllers. Multiple interfaces can be declared in a module, thus, different instances of the same module can be used in different situations. The interface is a subset of the module nodes, through which the communication with the environment is made. Module places can be annotated with a generic type, overridden with a concrete type at instance level, and constants declared in a module may have a new value in each instance.

A many-core co-processor for embedded parallel computing on FPGA

Single processor architectures are unable to provide the required performance of high performance embedded systems. Parallel processing based on general-purpose processors can achieve these performances with a considerable increase of required resources. However, in many cases, simplified optimized parallel cores can be used instead of general-purpose processors achieving better performance at lower resource utilization. In this paper, we propose a configurable many-core architecture to serve as a co-processor for high-performance embedded computing on Field-Programmable Gate Arrays. The architecture consists of an array of configurable simple cores with support for floating-point operations interconnected with a configurable interconnection network. For each core it is possible to configure the size of the internal memory, the supported operations and number of interfacing ports. The architecture was tested in a ZYNQ-7020 FPGA in the execution of several parallel algorithms. The results show that the proposed many-core architecture achieves better performance than that achieved with a parallel generalpurpose processor and that up to 32 floating-point cores can be implemented in a ZYNQ-7020 SoC FPGA.

GPU implementation of a hyperspectral coded aperture algorithm for compressive sensing

This paper presents a new parallel implementation of a previously hyperspectral coded aperture (HYCA) algorithm for compressive sensing on graphics processing units (GPUs). HYCA method combines the ideas of spectral unmixing and compressive sensing exploiting the high spatial correlation that can be observed in the data and the generally low number of endmembers needed in order to explain the data. The proposed implementation exploits the GPU architecture at low level, thus taking full advantage of the computational power of GPUs using shared memory and coalesced accesses to memory. The proposed algorithm is evaluated not only in terms of reconstruction error but also in terms of computational performance using two different GPU architectures by NVIDIA: GeForce GTX 590 and GeForce GTX TITAN. Experimental results using real data reveals signficant speedups up with regards to serial implementation.

Multi-agent management system for electric vehicle charging

This paper proposes an implementation, based on a multi-agent system, of a management system for automated negotiation of electricity allocation for charging electric vehicles (EVs) and simulates its performance. The widespread existence of charging infrastructures capable of autonomous operation is recognised as a major driver towards the mass adoption of EVs by mobility consumers. Eventually, conflicting requirements from both power grid and EV owners require automated middleman aggregator agents to intermediate all operations, for example, bidding and negotiation, between these parts. Multi-agent systems are designed to provide distributed, modular, coordinated and collaborative management systems; therefore, they seem suitable to address the management of such complex charging infrastructures. Our solution consists in the implementation of virtual agents to be integrated into the management software of a charging infrastructure. We start by modelling the multi-agent architecture using a federated, hierarchical layers setup and as well as the agents' behaviours and interactions. Each of these layers comprises several components, for example, data bases, decision-making and auction mechanisms. The implementation of multi-agent platform and auctions rules, and of models for battery dynamics, is also addressed. Four scenarios were predefined to assess the management system performance under real usage conditions, considering different types of profiles for EVs owners', different infrastructure configurations and usage and different loads on the utility grid (where real data from the concession holder of the Portuguese electricity transmission grid is used). Simulations carried with the four scenarios validate the performance of the modelled system while complying with all the requirements. Although all of these have been performed for one charging station alone, a multi-agent design may in the future be used for the higher level problem of distributing energy among charging stations. Copyright (c) 2014 John Wiley & Sons, Ltd.

Interação social entre agentes em ambientes de recursos limitados

Trabalho final de Mestrado para obtenção do grau de Mestre em Engenharia de Redes de Comunicação e Multimédia