32 resultados para Applied Computing


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As it is well known, competitive electricity markets require new computing tools for generation companies to enhance the management of its resources. The economic value of the water stored in a power system reservoir is crucial information for enhancing the management of the reservoirs. This paper proposes a practical deterministic approach for computing the short-term economic value of the water stored in a power system reservoir, emphasizing the need to considerer water stored as a scarce resource with a short-term economic value. The paper addresses a problem concerning reservoirs with small storage capacities, i.e., the reservoirs considered as head-sensitivity. More precisely, the respective hydro plant is head-dependent and a pure linear approach is unable to capture such consideration. The paper presents a case study supported by the proposed practical deterministic approach and applied on a real multi-reservoir power system with three cascaded reservoirs, considering as input data forecasts for the electric energy price and for the natural inflow into the reservoirs over the schedule time horizon. The paper presents various water schedules due to different final stored water volume conditions on the reservoirs. Also, it presents the respective economic value of the water for the reservoirs at different stored water volume conditions.

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Workflows have been successfully applied to express the decomposition of complex scientific applications. This has motivated many initiatives that have been developing scientific workflow tools. However the existing tools still lack adequate support to important aspects namely, decoupling the enactment engine from workflow tasks specification, decentralizing the control of workflow activities, and allowing their tasks to run autonomous in distributed infrastructures, for instance on Clouds. Furthermore many workflow tools only support the execution of Direct Acyclic Graphs (DAG) without the concept of iterations, where activities are executed millions of iterations during long periods of time and supporting dynamic workflow reconfigurations after certain iteration. We present the AWARD (Autonomic Workflow Activities Reconfigurable and Dynamic) model of computation, based on the Process Networks model, where the workflow activities (AWA) are autonomic processes with independent control that can run in parallel on distributed infrastructures, e. g. on Clouds. Each AWA executes a Task developed as a Java class that implements a generic interface allowing end-users to code their applications without concerns for low-level details. The data-driven coordination of AWA interactions is based on a shared tuple space that also enables support to dynamic workflow reconfiguration and monitoring of the execution of workflows. We describe how AWARD supports dynamic reconfiguration and discuss typical workflow reconfiguration scenarios. For evaluation we describe experimental results of AWARD workflow executions in several application scenarios, mapped to a small dedicated cluster and the Amazon (Elastic Computing EC2) Cloud.

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Although the computational power of mobile devices has been increasing, it is still not enough for some classes of applications. In the present, these applications delegate the computing power burden on servers located on the Internet. This model assumes an always-on Internet connectivity and implies a non-negligible latency. The thesis addresses the challenges and contributions posed to the application of a mobile collaborative computing environment concept to wireless networks. The goal is to define a reference architecture for high performance mobile applications. Current work is focused on efficient data dissemination on a highly transitive environment, suitable to many mobile applications and also to the reputation and incentive system available on this mobile collaborative computing environment. For this we are improving our already published reputation/incentive algorithm with knowledge from the usage pattern from the eduroam wireless network in the Lisbon area.

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Physical computing has spun a true global revolution in the way in which the digital interfaces with the real world. From bicycle jackets with turn signal lights to twitter-controlled christmas trees, the Do-it-Yourself (DiY) hardware movement has been driving endless innovations and stimulating an age of creative engineering. This ongoing (r)evolution has been led by popular electronics platforms such as the Arduino, the Lilypad, or the Raspberry Pi, however, these are not designed taking into account the specific requirements of biosignal acquisition. To date, the physiological computing community has been severely lacking a parallel to that found in the DiY electronics realm, especially in what concerns suitable hardware frameworks. In this paper, we build on previous work developed within our group, focusing on an all-in-one, low-cost, and modular biosignal acquisition hardware platform, that makes it quicker and easier to build biomedical devices. We describe the main design considerations, experimental evaluation and circuit characterization results, together with the results from a usability study performed with volunteers from multiple target user groups, namely health sciences and electrical, biomedical, and computer engineering. Copyright © 2014 SCITEPRESS - Science and Technology Publications. All rights reserved.

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Floating-point computing with more than one TFLOP of peak performance is already a reality in recent Field-Programmable Gate Arrays (FPGA). General-Purpose Graphics Processing Units (GPGPU) and recent many-core CPUs have also taken advantage of the recent technological innovations in integrated circuit (IC) design and had also dramatically improved their peak performances. In this paper, we compare the trends of these computing architectures for high-performance computing and survey these platforms in the execution of algorithms belonging to different scientific application domains. Trends in peak performance, power consumption and sustained performances, for particular applications, show that FPGAs are increasing the gap to GPUs and many-core CPUs moving them away from high-performance computing with intensive floating-point calculations. FPGAs become competitive for custom floating-point or fixed-point representations, for smaller input sizes of certain algorithms, for combinational logic problems and parallel map-reduce problems. © 2014 Technical University of Munich (TUM).

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This paper is about a hierarchical structure with an event-based supervisor in a higher level and a fractional-order proportional integral (FOPI) in a lower level applied to a wind turbine. The event-based supervisor analyzes the operation conditions to determine the state of the wind turbine. This controller operate in the full load region and the main objective is to capture maximum power generation while ensuring the performance and reliability required for a wind turbine to be integrated into an electric grid. The main contribution focus on the use of fractional-order proportional integral controller which benefits from the introduction of one more tuning parameter, the integral fractional-order, taking advantage over integer order proportional integral (PI) controller. Comparisons between fractional-order pitch control and a default proportional integral pitch controller applied to a wind turbine benchmark are given and simulation results by Matlab/Simulink are shown in order to prove the effectiveness of the proposed approach.

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This paper focus on a demand response model analysis in a smart grid context considering a contingency scenario. A fuzzy clustering technique is applied on the developed demand response model and an analysis is performed for the contingency scenario. Model considerations and architecture are described. The demand response developed model aims to support consumers decisions regarding their consumption needs and possible economic benefits.

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Selenium functions as a co-factor for the reduction of antioxidant enzymes and is an important component of antioxidant enzymes. Dietary selenium significantly inhibits the induction of skin, liver, colon, and mammary tumours in experimental animals by a number of different carcinogens, as well as the induction of mammary tumours by viruses. Selenium shows a “U” shaped curve for functionality, whereby too little is as damaging as too much. At optimal levels, selenium may protect against the formation of DNA adducts, DNA or chromosome breakage, chromosome gain or loss, mitochondrial DNA, and telomere length and function. Aim of study: Investigate the relation between selenium and genotoxic effects in a human biomonitoring study applied to occupational health.

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Invariant integrals are derived for nematic liquid crystals and applied to materials with small Ericksen number and topological defects. The nematic material is confined between two infinite plates located at y = -h and y = h (h is an element of R+) with a semi-infinite plate at y = 0 and x < 0. Planar and homeotropic strong anchoring boundary conditions to the director field are assumed at these two infinite and semi-infinite plates, respectively. Thus, a line disclination appears in the system which coincides with the z-axis. Analytical solutions to the director field in the neighbourhood of the singularity are obtained. However, these solutions depend on an arbitrary parameter. The nematic elastic force is thus evaluated from an invariant integral of the energy-momentum tensor around a closed surface which does not contain the singularity. This allows one to determine this parameter which is a function of the nematic cell thickness and the strength of the disclination. Analytical solutions are also deduced for the director field in the whole region using the conformal mapping method. (C) 2013 Elsevier Ltd. All rights reserved.

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Data analytic applications are characterized by large data sets that are subject to a series of processing phases. Some of these phases are executed sequentially but others can be executed concurrently or in parallel on clusters, grids or clouds. The MapReduce programming model has been applied to process large data sets in cluster and cloud environments. For developing an application using MapReduce there is a need to install/configure/access specific frameworks such as Apache Hadoop or Elastic MapReduce in Amazon Cloud. It would be desirable to provide more flexibility in adjusting such configurations according to the application characteristics. Furthermore the composition of the multiple phases of a data analytic application requires the specification of all the phases and their orchestration. The original MapReduce model and environment lacks flexible support for such configuration and composition. Recognizing that scientific workflows have been successfully applied to modeling complex applications, this paper describes our experiments on implementing MapReduce as subworkflows in the AWARD framework (Autonomic Workflow Activities Reconfigurable and Dynamic). A text mining data analytic application is modeled as a complex workflow with multiple phases, where individual workflow nodes support MapReduce computations. As in typical MapReduce environments, the end user only needs to define the application algorithms for input data processing and for the map and reduce functions. In the paper we present experimental results when using the AWARD framework to execute MapReduce workflows deployed over multiple Amazon EC2 (Elastic Compute Cloud) instances.

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As it is well known, competitive electricity markets require new computing tools for power companies that operate in retail markets in order to enhance the management of its energy resources. During the last years there has been an increase of the renewable penetration into the micro-generation which begins to co-exist with the other existing power generation, giving rise to a new type of consumers. This paper develops a methodology to be applied to the management of the all the aggregators. The aggregator establishes bilateral contracts with its clients where the energy purchased and selling conditions are negotiated not only in terms of prices but also for other conditions that allow more flexibility in the way generation and consumption is addressed. The aggregator agent needs a tool to support the decision making in order to compose and select its customers' portfolio in an optimal way, for a given level of profitability and risk.

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Workflows have been successfully applied to express the decomposition of complex scientific applications. However the existing tools still lack adequate support to important aspects namely, decoupling the enactment engine from tasks specification, decentralizing the control of workflow activities allowing their tasks to run in distributed infrastructures, and supporting dynamic workflow reconfigurations. We present the AWARD (Autonomic Workflow Activities Reconfigurable and Dynamic) model of computation, based on Process Networks, where the workflow activities (AWA) are autonomic processes with independent control that can run in parallel on distributed infrastructures. Each AWA executes a task developed as a Java class with a generic interface allowing end-users to code their applications without low-level details. The data-driven coordination of AWA interactions is based on a shared tuple space that also enables dynamic workflow reconfiguration. For evaluation we describe experimental results of AWARD workflow executions in several application scenarios, mapped to the Amazon (Elastic Computing EC2) Cloud.

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Recent integrated circuit technologies have opened the possibility to design parallel architectures with hundreds of cores on a single chip. The design space of these parallel architectures is huge with many architectural options. Exploring the design space gets even more difficult if, beyond performance and area, we also consider extra metrics like performance and area efficiency, where the designer tries to design the architecture with the best performance per chip area and the best sustainable performance. In this paper we present an algorithm-oriented approach to design a many-core architecture. Instead of doing the design space exploration of the many core architecture based on the experimental execution results of a particular benchmark of algorithms, our approach is to make a formal analysis of the algorithms considering the main architectural aspects and to determine how each particular architectural aspect is related to the performance of the architecture when running an algorithm or set of algorithms. The architectural aspects considered include the number of cores, the local memory available in each core, the communication bandwidth between the many-core architecture and the external memory and the memory hierarchy. To exemplify the approach we did a theoretical analysis of a dense matrix multiplication algorithm and determined an equation that relates the number of execution cycles with the architectural parameters. Based on this equation a many-core architecture has been designed. The results obtained indicate that a 100 mm(2) integrated circuit design of the proposed architecture, using a 65 nm technology, is able to achieve 464 GFLOPs (double precision floating-point) for a memory bandwidth of 16 GB/s. This corresponds to a performance efficiency of 71 %. Considering a 45 nm technology, a 100 mm(2) chip attains 833 GFLOPs which corresponds to 84 % of peak performance These figures are better than those obtained by previous many-core architectures, except for the area efficiency which is limited by the lower memory bandwidth considered. The results achieved are also better than those of previous state-of-the-art many-cores architectures designed specifically to achieve high performance for matrix multiplication.

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Copper iron (Cu-Fe) 3D porous foams for supercapacitor electrodes were electrodeposited in the cathodic regime, on stainless steel current collectors, using hydrogen bubbling dynamic template. The foams were prepared at different current densities and deposition times. The foams were submitted to thermal conditioning at temperatures of 150 and 250 degrees C. The morphology, composition and structure of the formed films were studied by SEM, EDS and XRD, respectively. The electrochemical behaviour was studied by cyclic voltammetry, electrochemical impedance spectroscopy and chronopotentiometry. The morphology of the 3D Cu-Fe foams is sensitive to the electrodeposition current and time. The increase of the current density produces a denser, larger and more ramified dendritic structure. Thermal conditioning at high temperature induces a coarser grain structure and the formation of copper oxides, which affect the electrochemical behaviour. The electrochemical response reveals the presence of various redox peaks assigned to the oxidation and reduction of Cu and Fe oxides and hydroxides in the foams. The specific capacitance of the 3D Cu Fe foams was significantly enhanced by thermal conditioning at 150 degrees C. The highest specific capacitance values attained 297 Fg(-1) which are much above the ones typically observed for single Cu or Fe Oxides and hydroxides. These values highlight a synergistic behaviour resulting from the combination of Cu and Fe in the form of nanostructured metallic foams. Moreover, the capacitance retention observed in an 8000 charge/discharge cycling test was above 66%, stating the good performance of these materials and its enhanced electrochemical response as supercapacitor negative electrodes. (C) 2014 Elsevier B.V. All rights reserved.

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Single processor architectures are unable to provide the required performance of high performance embedded systems. Parallel processing based on general-purpose processors can achieve these performances with a considerable increase of required resources. However, in many cases, simplified optimized parallel cores can be used instead of general-purpose processors achieving better performance at lower resource utilization. In this paper, we propose a configurable many-core architecture to serve as a co-processor for high-performance embedded computing on Field-Programmable Gate Arrays. The architecture consists of an array of configurable simple cores with support for floating-point operations interconnected with a configurable interconnection network. For each core it is possible to configure the size of the internal memory, the supported operations and number of interfacing ports. The architecture was tested in a ZYNQ-7020 FPGA in the execution of several parallel algorithms. The results show that the proposed many-core architecture achieves better performance than that achieved with a parallel generalpurpose processor and that up to 32 floating-point cores can be implemented in a ZYNQ-7020 SoC FPGA.