Welfare state regimes and gender inequalities in the exposure to work-related psychosocial hazards

Background: Gender inequalities in the exposure to work-related psychosocial hazards are well established. However, little is known about how welfare state regimes influence these inequalities. Objectives: To examine the relationship between welfare state regimes and gender inequalities in the exposure to work-related psychosocial hazards in Europe, considering occupational social class. Methods: We used a sample of 27, 465 workers from 28 European countries. Dependent variables were high strain, iso-strain, and effort-reward imbalance, and the independent was gender. We calculated the prevalence and prevalence ratio separately for each welfare state regime and occupational social class, using multivariate logistic regression models. Results: More female than male managers/professionals were exposed to: high strain, iso-strain, and effort–reward imbalance in Scandinavian [adjusted prevalence ratio (aPR) = 2·26; 95% confidence interval (95% CI): 1·87–2·75; 2·12: 1·72–2·61; 1·41: 1·15–1·74; respectively] and Continental regimes (1·43: 1·23–1·54; 1·51: 1·23–1·84; 1·40: 1·17–1·67); and to high strain and iso-strain in Anglo-Saxon (1·92: 1·40–2·63; 1·85: 1·30–2·64; respectively), Southern (1·43: 1·14–1·79; 1·60: 1·18–2·18), and Eastern regimes (1·56: 1·35–1·81; 1·53: 1·28–1·83). Conclusion: Gender inequalities in the exposure to work-related psychosocial hazards were not lower in those welfare state regimes with higher levels of universal social protection policies.

Efficient Mitigation of Data and Control Flow Errors in Microprocessors

The use of microprocessor-based systems is gaining importance in application domains where safety is a must. For this reason, there is a growing concern about the mitigation of SEU and SET effects. This paper presents a new hybrid technique aimed to protect both the data and the control-flow of embedded applications running on microprocessors. On one hand, the approach is based on software redundancy techniques for correcting errors produced in the data. On the other hand, control-flow errors can be detected by reusing the on-chip debug interface, existing in most modern microprocessors. Experimental results show an important increase in the system reliability even superior to two orders of magnitude, in terms of mitigation of both SEUs and SETs. Furthermore, the overheads incurred by our technique can be perfectly assumable in low-cost systems.