4 resultados para Armer, Chip
em Universidad de Alicante
Resumo:
En el ámbito de acústica de la edificación es común el uso de materiales fibrosos como materiales absorbentes acústicos. Uno de estos materiales cada vez más utilizado es la lana de poliéster. Un problema que presenta el chip virgen de poliéster es que se obtiene del petróleo, cuyo precio no hace más que incrementarse en los últimos años. En este trabajo se presenta una lana de poliéster alternativa, obtenida mediante el tratamiento del PET, a través del conveniente ciclo de reciclado de botellas de plástico. Se comparan valores del coeficiente de absorción; en incidencia normal y en cámara reverberante de los materiales elaborados a partir de chip virgen y de las nuevas lanas obtenidas del PET. Además, se propone un modelo empírico de comportamiento acústico de estas nuevas lanas. Los resultados obtenidos han sido favorables, la fibra virgen ya ha sido sustituida por fibra reciclada en su proceso de fabricación.
Resumo:
The current trend in the evolution of sensor systems seeks ways to provide more accuracy and resolution, while at the same time decreasing the size and power consumption. The use of Field Programmable Gate Arrays (FPGAs) provides specific reprogrammable hardware technology that can be properly exploited to obtain a reconfigurable sensor system. This adaptation capability enables the implementation of complex applications using the partial reconfigurability at a very low-power consumption. For highly demanding tasks FPGAs have been favored due to the high efficiency provided by their architectural flexibility (parallelism, on-chip memory, etc.), reconfigurability and superb performance in the development of algorithms. FPGAs have improved the performance of sensor systems and have triggered a clear increase in their use in new fields of application. A new generation of smarter, reconfigurable and lower power consumption sensors is being developed in Spain based on FPGAs. In this paper, a review of these developments is presented, describing as well the FPGA technologies employed by the different research groups and providing an overview of future research within this field.
Resumo:
The use of microprocessor-based systems is gaining importance in application domains where safety is a must. For this reason, there is a growing concern about the mitigation of SEU and SET effects. This paper presents a new hybrid technique aimed to protect both the data and the control-flow of embedded applications running on microprocessors. On one hand, the approach is based on software redundancy techniques for correcting errors produced in the data. On the other hand, control-flow errors can be detected by reusing the on-chip debug interface, existing in most modern microprocessors. Experimental results show an important increase in the system reliability even superior to two orders of magnitude, in terms of mitigation of both SEUs and SETs. Furthermore, the overheads incurred by our technique can be perfectly assumable in low-cost systems.
Resumo:
Comunicación presentada en las V Jornadas de Computación Empotrada, Valladolid, 17-19 Septiembre 2014