76 resultados para pre-romanesque architecture
em University of Queensland eSpace - Australia
Resumo:
A specialised reconfigurable architecture is targeted at wireless base-band processing. It is built to cater for multiple wireless standards. It has lower power consumption than the processor-based solution. It can be scaled to run in parallel for processing multiple channels. Test resources are embedded on the architecture and testing strategies are included. This architecture is functionally partitioned according to the common operations found in wireless standards, such as CRC error correction, convolution and interleaving. These modules are linked via Virtual Wire Hardware modules and route-through switch matrices. Data can be processed in any order through this interconnect structure. Virtual Wire ensures the same flexibility as normal interconnects, but the area occupied and the number of switches needed is reduced. The testing algorithm scans all possible paths within the interconnection network exhaustively and searches for faults in the processing modules. The testing algorithm starts by scanning the externally addressable memory space and testing the master controller. The controller then tests every switch in the route-through switch matrix by making loops from the shared memory to each of the switches. The local switch matrix is also tested in the same way. Next the local memory is scanned. Finally, pre-defined test vectors are loaded into local memory to check the processing modules. This paper compares various base-band processing solutions. It describes the proposed platform and its implementation. It outlines the test resources and algorithm. It concludes with the mapping of Bluetooth and GSM base-band onto the platform.
Resumo:
A specialised reconfigurable architecture for telecommunication base-band processing is augmented with testing resources. The routing network is linked via virtual wire hardware modules to reduce the area occupied by connecting buses. The number of switches within the routing matrices is also minimised, which increases throughput without sacrificing flexibility. The testing algorithm was developed to systematically search for faults in the processing modules and the flexible high-speed routing network within the architecture. The testing algorithm starts by scanning the externally addressable memory space and testing the master controller. The controller then tests every switch in the route-through switch matrix by making loops from the shared memory to each of the switches. The local switch matrix is also tested in the same way. Next the local memory is scanned. Finally, pre-defined test vectors are loaded into local memory to check the processing modules. This algorithm scans all possible paths within the interconnection network exhaustively and reports all faults. Strategies can be inserted to bypass minor faults
Resumo:
Architecture of the Pacific covers a region of more than third of the earth’s surface. The sparse Pacific population spreads over some 30 000 islands, which graduate in size from small atolls to the largest island, Australia, a continent. Pacific architecture can be studied as four cultural units: Micronesia, Polynesia, Melanesia, and Australasia (Australia and New Zealand). While many of the islands of Micronesia lie above the Equator, the remaining Pacific islands are in the southern hemisphere. With the exception of Australia, most of the islands have a warm and humid tropical climate with high rainfalls and lush vegetation. Some islands lie in the cyclonic and earthquake belts. Two distinct racial groups settled the region. The indigenous people, the Micronesians, Melanesians, Polynesians, Australian Aborigines and New Zealand Maoris, migrated from Asia thousands of years ago. The second group, the recent immigrants, were Europeans, who occupied the region during the last two centuries, and pockets of Asians brought in by colonial administrations as labourers during the early twentieth century.