RatSLAM: A hippocampal model for simultaneous localisation and mapping

The work presents a new approach to the problem of simultaneous localization and mapping - SLAM - inspired by computational models of the hippocampus of rodents. The rodent hippocampus has been extensively studied with respect to navigation tasks, and displays many of the properties of a desirable SLAM solution. RatSLAM is an implementation of a hippocampal model that can perform SLAM in real time on a real robot. It uses a competitive attractor network to integrate odometric information with landmark sensing to form a consistent representation of the environment. Experimental results show that RatSLAM can operate with ambiguous landmark information and recover from both minor and major path integration errors.

Motion analysis of right ventricular wall based on an electromechanical biventricular model

Based on our previously developed electrical heart model, an electromechanical biventricular model, which couples the electrical property and mechanical property of the heart, was constructed and the right ventricular wall motion and deformation was simulated using this model. The model was developed on the basis of composite material theory and finite element method. The excitation propagation was simulated by electrical heart model, and the resultant active forces were used to study the ventricular wall motion during systole. The simulation results show that: (1) The right ventricular free wall moves towards the septum, and at the same time, the base and middle of free wall move towards the apex, which reduce the volume of right ventricle; (2) The minimum principle strain (E3) is largest at the apex, then at the middle of free wall, and its direction is in the approximate direction of epicardial muscle fibers. These results are in good accordance with solutions obtained from MR tagging images. It suggests that such electromechanical biventricular model can be used to assess the mechanical function of two ventricles.

Investigating the use of sweet sorghum as a model for sugar accumulation in sugarcane

This paper outlines a current investigation of sugar accumulation in sweet sorghum to assist in understanding and simplifying this complex trait in sugarcane. A recombinant inbred line (RIL) sorghum population, between a sweet and a grain sorghum, has been developed and phenotyped for various morphological and agronomic traits related to grain yield, biomass and stem sugar content. A genetic linkage map will be constructed for the sweet sorghum population with the objective of identifying genomic regions associated with sucrose accumulation in sweet sorghum. This will lead to further work, including comparative mapping in sugarcane, to identify the extent to which sweet sorghum can be used as a model for investigating sugar accumulation in sugarcane.

A scaleless data model for direct and progressive spatial query processing

A progressive spatial query retrieves spatial data based on previous queries (e.g., to fetch data in a more restricted area with higher resolution). A direct query, on the other side, is defined as an isolated window query. A multi-resolution spatial database system should support both progressive queries and traditional direct queries. It is conceptually challenging to support both types of query at the same time, as direct queries favour location-based data clustering, whereas progressive queries require fragmented data clustered by resolutions. Two new scaleless data structures are proposed in this paper. Experimental results using both synthetic and real world datasets demonstrate that the query processing time based on the new multiresolution approaches is comparable and often better than multi-representation data structures for both types of queries.

Interface adaptor logic: A new model for interfacing peripherals in IP based designs

The introduction of standard on-chip buses has eased integration and boosted the production of IP functional cores. However, once an IP is bus specific retargeting to a different bus is time-consuming and tedious, and this reduces the reusability of the bus-specific IP. As new bus standards are introduced and different interconnection methods are proposed, this problem increases. Many solutions have been proposed, however these solutions either limit the IP block performance or are restricted to a particular platform. A new concept is presented that can connect IP blocks to a wide variety of interface architectures with low overhead. This is achieved through the use a special interface adaptor logic layer.