Application-Specific Instruction Set Processor for SoC implementation of Modern Signal Processing Algorithms

A novel application-specific instruction set processor (ASIP) for use in the construction of modern signal processing systems is presented. This is a flexible device that can be used in the construction of array processor systems for the real-time implementation of functions such as singular-value decomposition (SVD) and QR decomposition (QRD), as well as other important matrix computations. It uses a coordinate rotation digital computer (CORDIC) module to perform arithmetic operations and several approaches are adopted to achieve high performance including pipelining of the micro-rotations, the use of parallel instructions and a dual-bus architecture. In addition, a novel method for scale factor correction is presented which only needs to be applied once at the end of the computation. This also reduces computation time and enhances performance. Methods are described which allow this processor to be used in reduced dimension (i.e., folded) array processor structures that allow tradeoffs between hardware and performance. The net result is a flexible matrix computational processing element (PE) whose functionality can be changed under program control for use in a wider range of scenarios than previous work. Details are presented of the results of a design study, which considers the application of this decomposition PE architecture in a combined SVD/QRD system and demonstrates that a combination of high performance and efficient silicon implementation are achievable. © 2005 IEEE.

Electrical Characterisation of SOI Substrates Incorporating WSix Ground Planes

Silicon-on-insulator (SOI) substrates incorporating tungsten silicide ground planes (GPs) have been shown to offer the lowest reported crosstalk figure of merit for application in mixed signal integrated circuits. The inclusion of the silicide layer in the structure may lead to stress or defects in the overlying SOI layers and resultant degradation of device performance. It is therefore essential to establish the quality of the silicon on the GPSOI substrate. MOS capacitor structures have been employed in this paper to characterize these GPSOI substrates for the first time. High quality MOS capacitor characteristics have been achieved with minority carrier lifetime of similar to 0.8 ms. These results show that the substrate is suitable for device manufacture with no degradation in the silicon due to stress or metallic contamination resulting from the inclusion of the underlying silicide layer.

Characterisation of microwave phase conjugate signal generation using nonlinearly loaded wire frequency selective surface (FSS)

Both experimental and theoretical information regarding the scattering and phase conjugate mixing properties of a 2D double-periodic array of wires loaded with nonlinear/linear lumped elements have been provided. An experimental means for assessing the phase conjugate energy production capability for the array is given. These investigations enable identification of the fundamental operational characteristics and underlying mechanisms associated with the production of phase conjugate energy by this type of artificial electromagnetic media. Means for enhancing the phase conjugate energy production capability of the structure by using additional linear lumped loads is examined theoretically and limits on the production of phase conjugate energy established. Theoretical far-field prediction of the behaviour of the structure indicates that retro-directive reflector action as well as negative refraction should be possible.

Physical modelling of millimetre wave signal reflection from forward biased PIN diodes

This paper examines the DC power requirements of PIN diodes which, with suitable applied DC bias, have the potential to reflect or to permit transmission of millimetre wave energy through them by the process of inducing a semiconductor plasma layer in the i-region. The study is conducted using device level simulation of SOI and bulk PIN diodes and reflection modelling based on the Drude conduction model. We examined five diode lengths (60–140 µm) and seven diode thicknesses (4–100 µm). Simulation output for the diodes of varying thicknesses was subsequently used in reflection modelling to assess their performance for 100 GHz operation. It is shown that substantially high DC input power is required in order to induce near total reflection in SOI PIN diodes at 100 GHz. Thinner devices consume less DC power, but reflect less incident radiation for given input power. SOI diodes are shown to have improved carrier confinement compared with bulk diodes.

On the Distribution of Signal Phase in Body Area Networks

In this letter, we investigate the distribution of the phase component of the complex received signal observed in practical experiments using body area networks. Two phase distributions, the recently proposed kappa-mu and eta-mu probability densities, which together encompass the most widely used fading models, namely Semi-Gaussian, Rayleigh, Hoyt, Rice, and Nakagami-m, have been compared with measurement data. The kappa-mu distribution has been found to provide the best fit over a range of on-body links, while the user was mobile. The experiments were carried out in two dissimilar indoor environments at opposite ends of the multipath spectrum. It has also been found that the uniform phase distribution has not arisen in anyone of the experiments.

Low power field programmable gate array implementation of fast digital signal processing algorithms: characterisation and manipulation of data locality

Dynamic power consumption is very dependent on interconnect, so clever mapping of digital signal processing algorithms to parallelised realisations with data locality is vital. This is a particular problem for fast algorithm implementations where typically, designers will have sacrificed circuit structure for efficiency in software implementation. This study outlines an approach for reducing the dynamic power consumption of a class of fast algorithms by minimising the index space separation; this allows the generation of field programmable gate array (FPGA) implementations with reduced power consumption. It is shown how a 50% reduction in relative index space separation results in a measured power gain of 36 and 37% over a Cooley-Tukey Fast Fourier Transform (FFT)-based solution for both actual power measurements for a Xilinx Virtex-II FPGA implementation and circuit measurements for a Xilinx Virtex-5 implementation. The authors show the generality of the approach by applying it to a number of other fast algorithms namely the discrete cosine, the discrete Hartley and the Walsh-Hadamard transforms.

Received signal strength in large-scale wireless relay sensor network: a stochastic ray approach

The authors consider a point percolation lattice representation of a large-scale wireless relay sensor network (WRSN) deployed in a cluttered environment. Each relay sensor corresponds to a grid point in the random lattice and the signal sent by the source is modelled as an ensemble of photons that spread in the space, which may 'hit' other sensors and are 'scattered' around. At each hit, the relay node forwards the received signal to its nearest neighbour through direction-selective relaying. The authors first derive the distribution that a relay path reaches a prescribed location after undergoing certain number of hops. Subsequently, a closed-form expression of the average received signal strength (RSS) at the destination can be computed as the summation of all signal echoes' energy. Finally, the effect of the anomalous diffusion exponent ß on the mean RSS in a WRSN is studied, for which it is found that the RSS scaling exponent e is given by (3ß-1)/ß. The results would provide useful insight into the design and deployment of large-scale WRSNs in future. © 2011 The Institution of Engineering and Technology.

Amplitude modulated signal transmission through a phase conjugating lens

Free space transmission of an on-off modulated sinusoidal signal through a phase conjugating lens (PCL) is theoretically examined using a combined time/frequency domain approach. The on-off keyed (OOK) signal is generated by a dipole antenna located in the far-field zone of the lens. The PCL consists of a dual layer of antenna elements interconnected via phase conjugating circuitry. We demonstrate that electromagnetic interference between antenna elements creates spatially localised areas of good-quality reception and zones where the signal is significantly denigrated by interference. Next, it is shown that destructive interference and packet desynchronisation effects critically depend on bit rate. It is also shown that a circular concave lens can be used to produce high-quality signal reception in a given direction while suppressing signal reception in all other directions. The effect that the bandwidth of the phase conjugating unit has on the transmitted signal properties for the cases of high and low bit rate OOK modulation are studied and a signal quality characterisation scheme is proposed which uses cross-correlation. The results of the study yields understanding of the performance of phase conjugating arrays under OOK modulation. The work suggests a novel approach for realising a secure communication wireless system.

Analysis of Load Impact on Small-signal Stability based on Load Active Power Sensitivity

While load flow conditions vary with different loads, the small-signal stability of the entire system is closely related with to the locations, capacities and models of loads. In this paper, load impacts with different capacities and models on the small-signal stability are analysed. In the real large-scale power system case, the load sensitivity which denotes the sensitivity of the eigenvalue with respect to the load active power is introduced and applied to rank the loads. The loads with high sensitivity are also considered.

Small Signal Stability Performance of Power System during High Penetration of Wind Generation

The small signal stability of interconnected power systems is one of the important aspects that need to be investigated since the oscillations caused by this kind of instability have caused many incidents. With the increasing penetration of wind power in the power system, particularly doubly fed induction generator (DFIG), the impact on the power system small signal stability performance should be fully investigated. Because the DFIG wind turbine integration is through a fast action converter and associated control, it does not inherently participate in the electromechanical small signal oscillation. However, it influences the small signal stability by impacting active power flow paths in the network and replacing synchronous generators that have power system stabilizer (PSS). In this paper, the IEEE 39 bus test system has been used in the analysis. Furthermore, four study cases and several operation scenarios have been conducted and analysed. The selective eigenvalue Arnoldi/lanczos's method is used to obtain the system eigenvalue in the range of frequency from 0.2 Hz to 2 Hz which is related to electromechanical oscillations. Results show that the integration of DFIG wind turbines in a system during several study cases and operation scenarios give different influence on small signal stability performance.