Performance projections and design optimization of planar double gate SOI MOSFETs for logic technology applications

In this paper, by investigating the influence of source/drain extension region engineering (also known as gate-source/drain underlap) in nanoscale planar double gate (DG) SOI MOSFETs, we offer new insights into the design of future nanoscale gate-underlap DG devices to achieve ITRS projections for high performance (HP), low standby power (LSTP) and low operating power (LOP) logic technologies. The impact of high-kappa gate dielectric, silicon film thickness, together with parameters associated with the lateral source/drain doping profile, is investigated in detail. The results show that spacer width along with lateral straggle can not only effectively control short-channel effects, thus presenting low off-current in a gate underlap device, but can also be optimized to achieve lower intrinsic delay and higher on-off current ratio (I-on/I-off). Based on the investigation of on-current (I-on), off-current (I-off), I-on/I-off, intrinsic delay (tau), energy delay product and static power dissipation, we present design guidelines to select key device parameters to achieve ITRS projections. Using nominal gate lengths for different technologies, as recommended from ITRS specification, optimally designed gate-underlap DG MOSFETs with a spacer-to-straggle (s/sigma) ratio of 2.3 for HP/LOP and 3.2 for LSTP logic technologies will meet ITRS projection. However, a relatively narrow range of lateral straggle lying between 7 to 8 nm is recommended. A sensitivity analysis of intrinsic delay, on-current and off-current to important parameters allows a comparative analysis of the various design options and shows that gate workfunction appears to be the most crucial parameter in the design of DG devices for all three technologies. The impact of back gate misalignment on I-on, I-off and tau is also investigated for optimized underlap devices.

Adaptable housing design for climate change adaptation

It is predicted that climate change will result in rising sea levels, more frequent and extreme weather events, hotter and drier summers and warmer and wetter winters. This will have a significant impact on the design of buildings, how they are kept cool and how they are weathered against more extreme climatic conditions. The residential sector is already a significant environmental burden with high associated operational energy. Climate change, and a growing population requiring residence, has the potential to exacerbate this problem seriously. New paradigms for residential building design are required to enable low-carbon dioxide operation to mitigate climate change. They must also face the reality of inevitable climate change and adopt climate change adaptation strategies to cope with future scenarios. However, any climate adaptation strategy for dwellings must also be cognisant of adapting occupant needs, influenced by ageing populations and new technologies. This paper presents concepts and priorities for changing how society designs residential buildings by designing for adaptation. A case study home is analysed in the context of its stated aims of low energy and adaptability. A post-occupancy evaluation of the house is presented, and future-proofing strategies are evaluated using climate projection data for future climate change scenarios.