Defensio Prima and the Latin Poets

This chapter, in a prize-winning volume, examines ways in which Milton’s recourse to Latin poetry in Defensio Prima serves a much deeper purpose than that of merely illustrating or lending authority to his argument. Rather, it is argued, the defence engages with a variety of Latin intertexts (Plautus, Terence, Horace, Petronius), which in turn give birth to a range of dramatis personae, with whom Salmasius is ironically and somewhat kaleidoscopically equated. This methodology lends particular force to Milton’s rhetoric of invective whilst hopefully laying to rest the fallacy that his Latin prose writings were writing during a period of ‘poetic inactivity.’ For this is a prose work that is poetically as well as politically aware.

Crisis Cartels:Non-Economic Values, the Public Interest and Institutional Considerations

This paper considers the use of non-economic considerations in Article 101(3) analysis of industrial restructuring agreements, using the Commission's Decisions in Synthetic Fibres, Stichting Baksteen, and the recent UK Dairy Initiative as examples. I argue that contra to the Commission's recent economics-based approach; there is room for non-economic considerations to be taken into account within the framework of the European Treaties. The competition law issue is whether the provisions of Article 101(3) can save such agreements.
I further argue that there is legal room for non-economic considerations to be considered in evaluating these restructuring agreements, it is not clear who the appropriate arbiter of these considerations should be given the institutional limitations of courts (which have no democratic mandate), specialised competition agencies (which may be too technocratic in focus) and legislatures (which are susceptible to capture by rent-seeking interest groups).

Ultra-Compact and Robust FPGA-Based PUF Identification Generator

Physically Unclonable Functions (PUFs), exploit inherent manufacturing variations and present a promising solution for hardware security. They can be used for key storage, authentication and ID generations. Low power cryptographic design is also very important for security applications. However, research to date on digital PUF designs, such as Arbiter PUFs and RO PUFs, is not very efficient. These PUF designs are difficult to implement on Field Programmable Gate Arrays (FPGAs) or consume many FPGA hardware resources. In previous work, a new and efficient PUF identification generator was presented for FPGA. The PUF identification generator is designed to fit in a single slice per response bit by using a 1-bit PUF identification generator cell formed as a hard-macro. In this work, we propose an ultra-compact PUF identification generator design. It is implemented on ten low-cost Xilinx Spartan-6 FPGA LX9 microboards. The resource utilization is only 2.23%, which, to the best of the authors' knowledge, is the most compact and robust FPGA-based PUF identification generator design reported to date. This PUF identification generator delivers a stable range of uniqueness of around 50% and good reliability between 85% and 100%.