A 64-point fourier transform chip for video motion compensation using phase correlation

Details of a new low power fast Fourier transform (FFT) processor for use in digital television applications are presented. This has been fabricated using a 0.6-µm CMOS technology and can perform a 64 point complex forward or inverse FFT on real-time video at up to 18 Megasamples per second. It comprises 0.5 million transistors in a die area of 7.8 × 8 mm and dissipates 1 W. The chip design is based on a novel VLSI architecture which has been derived from a first principles factorization of the discrete Fourier transform (DFT) matrix and tailored to a direct silicon implementation.

Low power field programmable gate array implementation of fast digital signal processing algorithms: characterisation and manipulation of data locality

Dynamic power consumption is very dependent on interconnect, so clever mapping of digital signal processing algorithms to parallelised realisations with data locality is vital. This is a particular problem for fast algorithm implementations where typically, designers will have sacrificed circuit structure for efficiency in software implementation. This study outlines an approach for reducing the dynamic power consumption of a class of fast algorithms by minimising the index space separation; this allows the generation of field programmable gate array (FPGA) implementations with reduced power consumption. It is shown how a 50% reduction in relative index space separation results in a measured power gain of 36 and 37% over a Cooley-Tukey Fast Fourier Transform (FFT)-based solution for both actual power measurements for a Xilinx Virtex-II FPGA implementation and circuit measurements for a Xilinx Virtex-5 implementation. The authors show the generality of the approach by applying it to a number of other fast algorithms namely the discrete cosine, the discrete Hartley and the Walsh-Hadamard transforms.

Analyzing laser plasma interferograms with a continuous wavelet transform ridge extraction technique: the method

Laser plasma interferograms are currently analyzed by extraction of the phase-shift map with fast Fourier transform (FFT) techniques [Appl. Opt. 18, 3101 (1985)]. This methodology works well when interferograms are only marginally affected by noise and reduction of fringe visibility, but it can fail to produce accurate phase-shift maps when low-quality images are dealt with. We present a novel procedure for a phase-shift map computation that makes extensive use of the ridge extraction in the continuous wavelet transform (CWT) framework. The CWT tool is flexible because of the wide adaptability of the analyzing basis, and it can be accurate because of the intrinsic noise reduction in the ridge extraction. A comparative analysis of the accuracy performances of them new tool and the FFT-based one shows that the CWT-based tool produces phase maps considerably less noisy and that it can better resolve local inhomogeneties. (C) 2001 Optical Society of America.

Software defined FFT architecture for IEEE 802.11ac

The upcoming IEEE 802.11ac standard boosts the throughput of previous IEEE 802.11n by adding wider 80 MHz and 160 MHz channels with up to 8 antennas (versus 40 MHz channel and 4 antennas in 802.11n). This necessitates new 1-8 stream 256/512-point Fast Fourier Transform (FFT) / inverse FFT (IFFT) processing with 80/160 MSample/s throughput. Although there are abundant related work, they all fail to meet the requirements of IEEE 802.11ac FFT/IFFT on point size, throughput and multiple data streams at the same time. This paper proposes the first software defined FFT/IFFT architecture as a solution. By making use of a customised soft stream processor on FPGA, we show how a software defined FFT architecture can meet all the requirements of IEEE 802.11ac with low cost and high resource efficiency. When compared with dedicated Xilinx FFT core, our implementation exhibits only one third of the resources also up to three times of resource efficiency.

Soft-core Stream Processing on FPGA: An FFT Case Study

The increasing design complexity associated with modern Field Programmable Gate Array (FPGA) has prompted the emergence of 'soft'-programmable processors which attempt to replace at least part of the custom circuit design problem with a problem of programming parallel processors. Despite substantial advances in this technology, its performance and resource efficiency for computationally complex operations remains in doubt. In this paper we present the first recorded implementation of a softcore Fast-Fourier Transform (FFT) on Xilinx Virtex FPGA technology. By employing a streaming processing architecture, we show how it is possible to achieve architectures which offer 1.1 GSamples/s throughput and up to 19 times speed-up against the Xilinx Radix-2 FFT dedicated circuit with comparable cost.

Microstructural analysis of non-woven fabrics using scanning electron microscopy and image processing. Part 1:Development and verification of the methods

This paper reports image analysis methods that have been developed to study the microstructural changes of non-wovens made by the hydroentanglement process. The validity of the image processing techniques has been ascertained by applying them to test images with known properties. The parameters in preprocessing of the scanning electron microscope (SEM) images used in image processing have been tested and optimized. The fibre orientation distribution is estimated using fast Fourier transform (FFT) and Hough transform (HT) methods. The results obtained using these two methods are in good agreement. The HT method is more demanding in computational time compared with the Fourier transform (FT) method. However, the advantage of the HT method is that the actual orientation of the lines can be concluded directly from the result of the transform without the need for any further computation. The distribution of the length of the straight fibre segments of the fabrics is evaluated by the HT method. The effect of curl of the fibres on the result of this evaluation is shown.

Inter-Area Power Oscillation Frequency Mode with Wind Turbine Generator in Irish Power System using PMU Data

Two case studies are presented in this paper to demonstrate the impact of different power system operation conditions on the power oscillation frequency modes in the Irish power system. A simplified 2 area equivalent of the Irish power system has been used in this paper, where area 1 represents the Republic of Ireland power system and area 2 represents the Northern Ireland power system.

The potential power oscillation frequency modes on the interconnector during different operation conditions have been analysed in this paper. The main objective of this paper is to analyse the influence of different operation conditions involving wind turbine generator (WTG) penetration on power oscillation frequency modes using phasor measurement unit (PMU) data.

Fast Fourier transform (FFT) analysis was performed to identify the frequency oscillation mode while correlation coefficient analysis was used to determine the source of the frequency oscillation. The results show that WTG, particularly fixed speed induction generation (FSIG), gives significant contribution to inter-area power oscillation frequency modes during high WTG operation.

64-point Fourier transform chip for digital television applications

A 64-point Fourier transform chip is described that performs a forward or inverse, 64-point Fourier transform on complex two's complement data supplied at a rate of 13.5MHz and can operate at clock rates of up to 40MHz, under worst-case conditions. It uses a 0.6µm double-level metal CMOS technology, contains 535k transistors and uses an internal 3.3V power supply. It has an area of 7.8×8mm, dissipates 0.9W, has 48 pins and is housed in a 84 pin PLCC plastic package. The chip is based on a FFT architecture developed from first principles through a detailed investigation of the structure of the relevant DFT matrix and through mapping repetitive blocks within this matrix onto a regular silicon structure.

Bit-level systolic array implementation of the Winograd Fourier transform algorithm

A bit level systolic array system is proposed for the Winograd Fourier transform algorithm. The design uses bit-serial arithmetic and, in common with other systolic arrays, features nearest-neighbor interconnections, regularity and high throughput. The short interconnections in this method contrast favorably with the long interconnections between butterflies required in the FFT. The structure is well suited to VLSI implementations. It is demonstrated how long transforms can be implemented with components designed to perform a short length transform. These components build into longer transforms preserving the regularity and structure of the short length transform design.

SYSTOLIC IMPLEMENTATION OF THE WINOGRAD FOURIER TRANSFORM ALGORITHM.

A bit-level systolic array system is proposed for the Winograd Fourier transform algorithm. The design uses bit-serial arithmetic and, in common with other systolic arrays, features nearest neighbor interconnections, regularity, and high throughput. The short interconnections in this method contrast favorably with the long interconnections between butterflies required in the FFT. The structure is well suited to VLSI implementations. It is demonstrated how long transforms can be implemented with components designed to perform short-length transforms. These components build into longer transforms, preserving the regularity and structure of the short-length transform design.

Low Complexity Spectral Analysis of Heart-Rate-Variability through a Wavelet based FFT

In this paper, a low complexity system for spectral analysis of heart rate variability (HRV) is presented. The main idea of the proposed approach is the implementation of the Fast-Lomb periodogram that is a ubiquitous tool in spectral analysis, using a wavelet based Fast Fourier transform. Interestingly we show that the proposed approach enables the classification of processed data into more and less significant based on their contribution to output quality. Based on such a classification a percentage of less-significant data is being pruned leading to a significant reduction of algorithmic complexity with minimal quality degradation. Indeed, our results indicate that the proposed system can achieve up-to 45% reduction in number of computations with only 4.9% average error in the output quality compared to a conventional FFT based HRV system.

Forensic analysis of architectural finishes using Fourier transform infrared and Raman spectroscopy, Part I: The resin bases

The ability of Raman spectroscopy and Fourier transform infrared (FT-IR) microscopy to discriminate between resins used for the manufacture of architectural finishes was examined in a study of 39 samples taken from a commercial resin library. Both Raman and FT-IR were able to discriminate between different types of resin and both split the samples into several groups (six for FT-IR, six for Raman), each of which gave similar, but not identical, spectra. In addition, three resins gave unique Raman spectra (four in FTIR). However, approximately half the library comprised samples that were sufficiently similar that they fell into a single large group, whether classified using FT-IR or Raman, although the remaining samples fell into much smaller groups. Further sub-division of the FT-IR groups was not possible because the experimental uncertainty was of similar magnitude to the within-group variation. In contrast, Raman spectroscopy was able to further discriminate between resins that fell within the same groups because the differences in the relative band intensities of the resins, although small, were larger than the experimental uncertainty.