Teaching Art History to Design Students

Art History is often seen as a mandatory core course in the curricula of design programs but it is rarely tailored to the needs and goals of such programs. Instead, the traditional chronological organization of lecture topics, invariably beginning with the “Venus of Willendorf” (c. 25,000 BC) is presented in order to impart to the students a supposed holistic “big picture.” This essay outlines the re-structuring of a two-semester first-year faculty-wide introductory art history course, entitled “History of Art and Design,” in the Faculty of Fine Arts and Design at Izmir University of Economics, Izmir, Turkey. The course was re-configured from a conventional chronologically-presented (time-oriented) lecture series to a thematically presented (topic-oriented) lecture series more relevant to the students of the faculty – architecture, interior architecture, graphic design, industrial design, and fashion design students.

Design and Practice in Architectural Theory Education

Benefiting from design in theory learning is not common in architecture schools. The general practice is to design in studio and to theorise in lectures. In the undergraduate module History and Theory in Architecture II at Queen’s University Belfast, students attend interactive lectures, participate in reading group discussions, design TextObjects, and write essays. TextObjects contain textual, audio and/or graphic representations that highlight a single concept or a complex set of issues derived from readings. Students experiment with diverse media, such as filmmaking, photography, and graphic design, some of which they experience for the first time. Lectures and readings revolve around theories of architectural representation, media and communication, which are practiced through TextObjects. This is a new way to link theory and practice in architectural education. Through action research, this study analyses this innovative teaching method called TextObject, which brings design and practice into architectural theory education to stimulate students towards critical thinking. The pedagogical research of architectural theoretician Necdet Teymur (1992, 1996, 2002) underlies the study.

Performance projections and design optimization of planar double gate SOI MOSFETs for logic technology applications

In this paper, by investigating the influence of source/drain extension region engineering (also known as gate-source/drain underlap) in nanoscale planar double gate (DG) SOI MOSFETs, we offer new insights into the design of future nanoscale gate-underlap DG devices to achieve ITRS projections for high performance (HP), low standby power (LSTP) and low operating power (LOP) logic technologies. The impact of high-kappa gate dielectric, silicon film thickness, together with parameters associated with the lateral source/drain doping profile, is investigated in detail. The results show that spacer width along with lateral straggle can not only effectively control short-channel effects, thus presenting low off-current in a gate underlap device, but can also be optimized to achieve lower intrinsic delay and higher on-off current ratio (I-on/I-off). Based on the investigation of on-current (I-on), off-current (I-off), I-on/I-off, intrinsic delay (tau), energy delay product and static power dissipation, we present design guidelines to select key device parameters to achieve ITRS projections. Using nominal gate lengths for different technologies, as recommended from ITRS specification, optimally designed gate-underlap DG MOSFETs with a spacer-to-straggle (s/sigma) ratio of 2.3 for HP/LOP and 3.2 for LSTP logic technologies will meet ITRS projection. However, a relatively narrow range of lateral straggle lying between 7 to 8 nm is recommended. A sensitivity analysis of intrinsic delay, on-current and off-current to important parameters allows a comparative analysis of the various design options and shows that gate workfunction appears to be the most crucial parameter in the design of DG devices for all three technologies. The impact of back gate misalignment on I-on, I-off and tau is also investigated for optimized underlap devices.

Engineering source/drain extension regions in nanoscale double gate (DG) SOI MOSFETs: Analytical model and design considerations

In this paper, we propose for the first time, an analytical model for short channel effects in nanoscale source/drain extension region engineered double gate (DG) SOI MOSFETs. The impact of (i) lateral source/drain doping gradient (d), (ii) spacer width (s), (iii) spacer to doping gradient ratio (s/d) and (iv) silicon film thickness (T-si), on short channel effects - threshold voltage (V-th) and subthreshold slope (S), on-current (I-on), off-current (I-on) and I-on/I-off is extensively analysed by using the analytical model and 2D device simulations. The results of the analytical model confirm well with simulated data over the entire range of spacer widths, doping gradients and effective channel lengths. Results show that lateral source/drain doping gradient along with spacer width can not only effectively control short channel effects, thus presenting low off-current, but can also be optimised to achieve high values of on-currents. The present work provides valuable design insights in the performance of nanoscale DG Sol devices with optimal source/drain engineering and serves as a tool to optimise important device and technological parameters for 65 nm technology node and below. (c) 2006 Elsevier Ltd. All rights reserved.

THEORY AND DESIGN OF A TUNABLE QUASI-LUMPED QUADRATURE COUPLER

In this article, we present the theory and a design methodology for a unable Quasi-Lumped Quadrature Coupler (QLQC). Because of its topology, the coupler is simply reconfigured by switching the bias of two varactor diodes via a very simple DC bias circuitry. No additional capacitors or inductors are required. A prototype at 3.5 GHz is etched on a 0.130-mm-thick layer substrate with a dielectric material of relative permittivity of 2.22. The simulated and measured scattering parameters are, presented. (c) 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 51: 2219-2222 2009: Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24526

Art and Architecture of Ireland Volume Four:Architecture: 1600-2000

Three Entries: Peacelines; Public Housing in Northern Ireland in the Twentieth Century; Interpretive Centres, NI Peacelines, NI Social Housing