Memory-Centric Hardware Synthesis from Dataflow Models

Generation of hardware architectures directly from dataflow representations is increasingly being considered as research moves toward system level design methodologies. Creation of networks of IP cores to implement actor functionality is a common approach to the problem, but often the memory sub-systems produced using these techniques are inefficiently utilised. This paper explores some of the issues in terms of memory organisation and accesses when developing systems from these high level representations. Using a template matching design study, challenges such as modelling memory reuse and minimising buffer requirements are examined, yielding results with significantly less memory requirements and costly off-chip memory accesses.

Confined Site Construction: Issues Regarding Implementation of Health and Safety

The objective of this paper is to identify the various managerial constraints, difficulties and issues encountered and resulting strategies adopted, to aid in the management of the various and often complex health and safety concerns, which occur within a confined construction site. This is achieved through classifying the various managerial burdens encountered with the numerous strategies adopted, to ensure the successful management of such confined environments within the realm of health and safety. Through an extensive literature review and detailed interviews, a comprehensive insight into the health and safety concerns within a confined construction site environment is portrayed. The leading managerial strategies to the management of health and safety on confined construction sites may be listed as follows; (1) Traffic Management Plan, (2) Effective Resource Management Plan, (3) Temporary Facilities Management Plan, (4) Safe System of Work Plan, (5) Site Safety Plan, (6) Design Site Layout, (7) Space Management Plan, (8) Effective Program Management, and (9) Space Scheduling. Based on the research, it can be concluded, that through effective management of these issues identified coupled with implementing the various strategies highlighted; successful management of health and safety within a confined construction site environment is attainable.

Low-cost digital signature architecture suitable for radio frequency identification tags

Continuing achievements in hardware technology are bringing ubiquitous computing closer to reality. The notion of a connected, interactive and autonomous environment is common to all sensor networks, biosystems and radio frequency identification (RFID) devices, and the emergence of significant deployments and sophisticated applications can be expected. However, as more information is collected and transmitted, security issues will become vital for such a fully connected environment. In this study the authors consider adding security features to low-cost devices such as RFID tags. In particular, the authors consider the implementation of a digital signature architecture that can be used for device authentication, to prevent tag cloning, and for data authentication to prevent transmission forgery. The scheme is built around the signature variant of the cryptoGPS identification scheme and the SHA-1 hash function. When implemented on 130 nm CMOS the full design uses 7494 gates and consumes 4.72 mu W of power, making it smaller and more power efficient than previous low-cost digital signature designs. The study also presents a low-cost SHA-1 hardware architecture which is the smallest standardised hash function design to date.

A scalable packet sorting circuit for high-speed WFQ packet scheduling

A novel implementation of a tag sorting circuit for a weighted fair queueing (WFQ) enabled Internet Protocol (IP) packet scheduler is presented. The design consists of a search tree, matching circuitry, and a custom memory layout. It is implemented using 130-nm silicon technology and supports quality of service (QoS) on networks at line speeds of 40 Gb/s, enabling next generation IP services to be deployed.