Development tools for opportunistic pervasive computing

The goal of the POBICOS project is a platform that facilitates the development and deployment of pervasive computing applications destined for networked, cooperating objects. POBICOS object communities are heterogeneous in terms of the sensing, actuating, and computing resources contributed by each object. Moreover, it is assumed that an object community is formed without any master plan; for example, it may emerge as a by-product of acquiring everyday, POBICOS-enabled objects by a household. As a result, the target object community is, at least partially, unknown to the application programmer, and so a POBICOS application should be able to deliver its functionality on top of diverse object communities (we call this opportunistic computing). The POBICOS platform includes a middleware offering a programming model for opportunistic computing, as well as development and monitoring tools. This paper briefly describes the tools produced in the first phase of the project. Also, the stakeholders using these tools are identified, and a development process for both the middleware and applications is presented. © 2009 IEEE.

Active singly and dual polarised interwoven spiral frequency selective surfaces

Reconfigurable bi-state interwoven spiral FSSs are explored in this work. Their switching capability is realized by pin diodes that enable the change of the electromagnetic response between transparent and reflecting modes at the specified frequencies in both singly and dual polarised unit cell configurations. The proposed topologies are single layer FSS with their elements acting also as dc current carrying conductors supplying the bias signal for switching pin diodes between the on and off states, thus avoiding the need of external bias lines that can cause parasitic resonances and affect the response at oblique incidence. The presented simulation results show that such active FSSs have potentially good isolation between the transmission and reflection states, while retaining the substantially subwavelength response of the unit cell with large fractional bandwidths (FBWs) inherent to the original passive FSSs.

Characterisation of nonlinear distortion and intermodulation in passive devices and antennas

The paper presents a conceptual discussion of the characterisation and phenomenology of passive intermodulation (PIM) by the localised and distributed nonlinearities in passive devices and antennas. The PIM distinctive nature and its impact on signal distortions are examined in comparison with similar effects in power amplifiers. The main features of PIM generation are discussed and illustrated by the example of PIM due to electro-thermal nonlinearity. The issues of measurement, discrimination and modelling of PIM generated by nonlinearities in passive RF components and antennas are addressed.

Two-Stage Orthogonal Least Squares Methods for Neural Network Construction

A number of neural networks can be formulated as the linear-in-the-parameters models. Training such networks can be transformed to a model selection problem where a compact model is selected from all the candidates using subset selection algorithms. Forward selection methods are popular fast subset selection approaches. However, they may only produce suboptimal models and can be trapped into a local minimum. More recently, a two-stage fast recursive algorithm (TSFRA) combining forward selection and backward model refinement has been proposed to improve the compactness and generalization performance of the model. This paper proposes unified two-stage orthogonal least squares methods instead of the fast recursive-based methods. In contrast to the TSFRA, this paper derives a new simplified relationship between the forward and the backward stages to avoid repetitive computations using the inherent orthogonal properties of the least squares methods. Furthermore, a new term exchanging scheme for backward model refinement is introduced to reduce computational demand. Finally, given the error reduction ratio criterion, effective and efficient forward and backward subset selection procedures are proposed. Extensive examples are presented to demonstrate the improved model compactness constructed by the proposed technique in comparison with some popular methods.

DEX: self-healing expanders

Statistical data correction for unreliable memories

In this paper, we introduce a statistical data-correction framework that aims at improving the DSP system performance in presence of unreliable memories. The proposed signal processing framework implements best-effort error mitigation for signals that are corrupted by defects in unreliable storage arrays using a statistical correction function extracted from the signal statistics, a data-corruption model, and an application-specific cost function. An application example to communication systems demonstrates the efficacy of the proposed approach.

On the performance of LDPC and turbo decoder architectures with unreliable memories

In this paper, we investigate the impact of faulty memory bit-cells on the performance of LDPC and Turbo channel decoders based on realistic memory failure models. Our study investigates the inherent error resilience of such codes to potential memory faults affecting the decoding process. We develop two mitigation mechanisms that reduce the impact of memory faults rather than correcting every single error. We show how protection of only few bit-cells is sufficient to deal with high defect rates. In addition, we show how the use of repair-iterations specifically helps mitigating the impact of faults that occur inside the decoder itself.

Foreword

Presents the introductory welcome message from the conference proceedings. May include the conference officers' congratulations to all involved with the conference event and publication of the proceedings record.

Secure key generation from OFDM subcarriers' channel responses

The ability to exchange keys between users is vital in any wireless based security system. A key generation technique which exploits the randomness of the wireless channel is a promising alternative to existing key distribution techniques, e.g., public key cryptography. In this paper, a secure key generation scheme based on the subcarriers' channel responses in orthogonal frequency-division multiplexing (OFDM) systems is proposed. We first implement a time-variant multipath channel with its channel impulse response modelled as a wide sense stationary (WSS) uncorrelated scattering random process and demonstrate that each subcarrier's channel response is also a WSS random process. We then define the X% coherence time as the time required to produce an X% correlation coefficient in the autocorrelation function (ACF) of each channel tap, and find that when all the channel taps have the same Doppler power spectrum, all subcarriers' channel responses has the same ACF as the channel taps. The subcarrier's channel response is then sampled every X% coherence time and quantized into key bits. All the key sequences' randomness is tested using National Institute of Standards and Technology (NIST) statistical test suite and the results indicate that the commonly used sampling interval as 50% coherence time cannot guarantee the randomness of the key sequence.

A green perspective on Structured parallel programming

Structured parallel programming, and in particular programming models using the algorithmic skeleton or parallel design pattern concepts, are increasingly considered to be the only viable means of supporting effective development of scalable and efficient parallel programs. Structured parallel programming models have been assessed in a number of works in the context of performance. In this paper we consider how the use of structured parallel programming models allows knowledge of the parallel patterns present to be harnessed to address both performance and energy consumption. We consider different features of structured parallel programming that may be leveraged to impact the performance/energy trade-off and we discuss a preliminary set of experiments validating our claims.

The Loop-of-Stencil-Reduce Paradigm

In this paper we advocate the Loop-of-stencil-reduce pattern as a way to simplify the parallel programming of heterogeneous platforms (multicore+GPUs). Loop-of-Stencil-reduce is general enough to subsume map, reduce, map-reduce, stencil, stencil-reduce, and, crucially, their usage in a loop. It transparently targets (by using OpenCL) combinations of CPU cores and GPUs, and it makes it possible to simplify the deployment of a single stencil computation kernel on different GPUs. The paper discusses the implementation of Loop-of-stencil-reduce within the FastFlow parallel framework, considering a simple iterative data-parallel application as running example (Game of Life) and a highly effective parallel filter for visual data restoration to assess performance. Thanks to the high-level design of the Loop-of-stencil-reduce, it was possible to run the filter seamlessly on a multicore machine, on multi-GPUs, and on both.

Computer usage and the validity of self-assessed computer competence among first-year business students

Abstract This study evaluates the reliability of self-assessment as a measure of computer competence. This evaluation is carried out in response to recent research which has employed self-reported ratings as the sole indicator of students’ computer competence. To evaluate the reliability of self-assessed computer competence, the scores achieved by students in self-assessed computer competence tests are compared with scores achieved in objective tests. The results reveal a statistically significantly over-estimation of computer competence among the students surveyed. Furthermore, reported pre-university computer experience in terms of home and school use and formal IT education does not affect this result. The findings call into question the validity of using self-assessment as a measure of computer competence. More generally, the study also provides an up-to-date picture of self-reported computer usage and IT experience among pre-university students from New Zealand and South-east Asia and contrasts these findings with those from previous research.

Development of small and medium-sized enterprise horizontal innovation networks: UK agri-food sector study

Within the management literature, there is an emergent discourse on horizontal collaboration among small and medium-sized enterprises (SMEs), whereby individual rivalries are overcome by the need for more resources and innovation, leading to increased competitiveness through joint product development. In particular, a number of these horizontal collaborations between SMEs have occurred within the agri-food sector. As a consequence, this article aims to explore the longitudinal development of horizontal innovation networks within an artisan bakers’ network as part of the UK SME agri-food sector. An interpretivist research approach was used, whereby the development and evolution of an artisan bakers’ horizontal network was studied over a 27-month period. The findings, as summarised in conceptual models which draw upon knowledge-based open innovation and social network constructs, illustrate that a complex three-stage life cycle development occurred within the bakers’ horizontal network.