Cache-Integrated Network Interfaces: Flexible On-Chip Communication and Synchronization for Large-Scale CMPs

Per-core scratchpad memories (or local stores) allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architectures become more distributed. We have designed cache-integrated network interfaces, appropriate for scalable multicores, that combine the best of two worlds – the flexibility of caches and the efficiency of scratchpad memories: on-chip SRAM is configurably shared among caching, scratchpad, and virtualized network interface (NI) functions. This paper presents our architecture, which provides local and remote scratchpad access, to either individual words or multiword blocks through RDMA copy. Furthermore, we introduce event responses, as a technique that enables software configurable communication and synchronization primitives. We present three event response mechanisms that expose NI functionality to software, for multiword transfer initiation, completion notifications for software selected sets of arbitrary size transfers, and multi-party synchronization queues. We implemented these mechanisms in a four-core FPGA prototype, and measure the logic overhead over a cache-only design for basic NI functionality to be less than 20%. We also evaluate the on-chip communication performance on the prototype, as well as the performance of synchronization functions with simulation of CMPs with up to 128 cores. We demonstrate efficient synchronization, low-overhead communication, and amortized-overhead bulk transfers, which allow parallelization gains for fine-grain tasks, and efficient exploitation of the hardware bandwidth.

An exploration of the attitudes and strategic responses of soleproprietor micro-enterprises in adopting information and communication technology

This article analyses longitudinal case-based research exploring the attitudes and strategic responses of micro-enterprise owners in adopting information and communication technology (ICT). In so doing, it contributes to the limited literature on micro-enterprise ICT adoption, with a particular focus on sole proprietors. It provides a basis for widening the theoretical base of the literature pertaining to ICT adoption on two levels. First, a framework is developed which integrates the findings to illustrate the relationships between attitudes towards ICT adoption, endogenous and exogenous influencers of these attitudes and subsequent strategic response in ICT adoption. Second, building upon this framework the article reveals the unique challenges, opportunities and implications of ICT adoption for sole-proprietor micro-enterprises. © The Author(s) 2012