Extruder Melt Temperature Control with Fuzzy Logic

In polymer extrusion, the delivery of a melt which is homogenous in composition and temperature is paramount for achieving high quality extruded products. However, advancements in process control are required to reduce temperature variations across the melt flow which can result in poor product quality. The majority of thermal monitoring methods provide only low accuracy point/bulk melt temperature measurements and cause poor controller performance. Furthermore, the most common conventional proportional-integral-derivative controllers seem to be incapable of performing well over the nonlinear operating region. This paper presents a model-based fuzzy control approach to reduce the die melt temperature variations across the melt flow while achieving desired average die melt temperature. Simulation results confirm the efficacy of the proposed controller.

Cache-Integrated Network Interfaces: Flexible On-Chip Communication and Synchronization for Large-Scale CMPs

Per-core scratchpad memories (or local stores) allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architectures become more distributed. We have designed cache-integrated network interfaces, appropriate for scalable multicores, that combine the best of two worlds – the flexibility of caches and the efficiency of scratchpad memories: on-chip SRAM is configurably shared among caching, scratchpad, and virtualized network interface (NI) functions. This paper presents our architecture, which provides local and remote scratchpad access, to either individual words or multiword blocks through RDMA copy. Furthermore, we introduce event responses, as a technique that enables software configurable communication and synchronization primitives. We present three event response mechanisms that expose NI functionality to software, for multiword transfer initiation, completion notifications for software selected sets of arbitrary size transfers, and multi-party synchronization queues. We implemented these mechanisms in a four-core FPGA prototype, and measure the logic overhead over a cache-only design for basic NI functionality to be less than 20%. We also evaluate the on-chip communication performance on the prototype, as well as the performance of synchronization functions with simulation of CMPs with up to 128 cores. We demonstrate efficient synchronization, low-overhead communication, and amortized-overhead bulk transfers, which allow parallelization gains for fine-grain tasks, and efficient exploitation of the hardware bandwidth.

Luminescent Photoinduced Electron Transfer (PET) Molecules for Sensing and Logic Operations

Chemical species can serve as inputs to supramolecular devices so that a luminescence output is created in a conditional manner. Conditionality is built into these devices by employing the classical photochemical process of photoinduced electron transfer (PET) to compete with luminescence emission. The response of these devices in the analogue regime leads to sensors that can operate in nanometric, micrometric, and millimetric spaces. Some of these devices serve in membrane science, cell physiology, and medical diagnostics. The response in the digital regime leads to Boolean logic gates. Some of these find application in improving aspects of medical diagnostics and in identifying small objects in large populations.